Adstar原理图

5544332211DDCCBBAATitleSizeDocumentNumberRevDate:SheetofChangeLog1.0adStarEvaluationBoardA317Wednesday,March14,2012TitleSizeDocumentNumberRevDate:SheetofChangeLog1.0adStarEvaluationBoardA317Wednesday,March14,2012TitleSizeDocumentNumberRevDate:SheetofChangeLog1.0adStarEvaluationBoardA317Wednesday,March14,2012ChangeLog:5544332211DDCCBBAAnRESETXOUTXINTAP_SEL/LEDNF_D0NF_D1NF_D2NF_D3NF_D4/SDHC_D0NF_D5/SDHC_D1NF_D6/SDHC_D2NF_D7/SDHC_D3NF_nWENF_nRENF_nCSNF_CLENF_ALEUSB_DPUSB_DMADC_VIN3ADC_VIN2ADC_VIN1ADC_VIN0R7R6R4R5R2/TDIR0/nTRSTR1/TCKR3G6/CFG3G4/CFG1G5/CFG2G2G0/TMSG1/TDOG3/CFG0G7/CFG4B6/P8.6B4/P8.4B5/P8.5B2/P8.2B0/P8.0B1/P8.1B3/P8.3B7/P8.7HSYNCDCLKDELCD_CLK_INVSYNCTWI_SCLTWI_SDAPLL0_A18PLL0_AGADC_V33ADC_GNDUSB_V33PLL1_AGPLL1_A18I2S_MCLKI2S0_SCLKI2S0_LRCLKI2S0_SDII2S0_SDOFLASH_nCSFLASH_CLKFLASH_D0FLASH_D1FLASH_D2FLASH_D3PLL0_VCTRADC_V33NF_nBUSYP0.2P0.3UART_RX0UART_TX0UART_RX1UART_TX1UART_RX2UART_TX2UART_RX3UART_TX3P3.0P3.1P3.4P3.5P3.6P3.7P4.1PLL0_A18PLL1_A18USB_V33ADC_GNDPLL0_AGPLL1_AGR3R4R5R6R7G2G3/CFG0G4/CFG1G5/CFG2G6/CFG3G7/CFG4B5/P8.5B6/P8.6B7/P8.7B3/P8.3B4/P8.4HSYNCVSYNCDCLKDELCD_CLK_INB0/P8.0B1/P8.1B2/P8.2ADC_VREFPLL1_VCTRG1/TDOR2/TDIG0/TMSR0/nTRSTR1/TCKUSB_GNDUSB_GNDGND+3.3v+3.3vGND+1.8vGNDGND+3.3vOTP_VDDGND+3.3vADC_V33PLL0_A18PLL1_A18PLL0_A18PLL1_A18USB_V33ADC_GNDPLL0_AGPLL1_AG+3.3vGNDGNDGNDADC_V33ADC_GNDGNDGNDOTP_VDD+3.3v+1.8v_mcuGNDUSB_GNDnRESET[4,7]TAP_SEL/LED[3,7]USB_DP[4]USB_DM[4]I2S_MCLK[5]I2S0_SCLK[5]I2S0_LRCLK[5]I2S0_SDO[5]I2S0_SDI[5]FLASH_nCS[5]FLASH_CLK[5]FLASH_D0[5]FLASH_D1[5]FLASH_D2[5]FLASH_D3[5]HSYNC[6]DE[6]DCLK[6]VSYNC[6]NF_ALE/SDHC_CMD[3,4]NF_CLE/SDHC_CLK[3,4]NF_nWE[3]NF_nRE[3]NF_nCS[3]NF_nBUSY[3]UART_RX0[4]UART_RX1[4]UART_RX2[4]UART_RX3[4]UART_TX0[4]UART_TX1[4]UART_TX2[4]UART_TX3[4]P3.0[6]P3.1[6]P3.4[4]P3.5[4]P3.6[4]P3.7[4]P4.1[6]TWI_SCL[5,6]TWI_SDA[5,6]ADC_VIN0[5]ADC_VIN1[5]ADC_VIN2[5]ADC_VIN3[5]B0/P8.0[4]B1/P8.1[4]B2/P8.2[4]G2[6]G3/CFG0[3,6]G4/CFG1[3,6]G5/CFG2[3,6]G6/CFG3[3,6]G7/CFG4[3,6]B3/P8.3[4,6]B4/P8.4[4,6]B5/P8.5[4,6]B6/P8.6[4,6]B7/P8.7[4,6]R3[6]R4[6]R5[6]R6[6]R7[6]Touch_nIRQ[6]P0.2[3]P0.3[3]NF_D0[3]NF_D1[3]NF_D2[3]NF_D3[3]NF_D4/SDHC_D0[3,4]NF_D5/SDHC_D1[3,4]NF_D6/SDHC_D2[3,4]NF_D7/SDHC_D3[3,4]TitleSizeDocumentNumberRevDate:SheetofadStar1.0adStarEvaluationBoardA327Wednesday,April11,2012TitleSizeDocumentNumberRevDate:SheetofadStar1.0adStarEvaluationBoardA327Wednesday,April11,2012TitleSizeDocumentNumberRevDate:SheetofadStar1.0adStarEvaluationBoardA327Wednesday,April11,2012R40R0603R40R0603C720pFC0603C720pFC0603Y110MHzHC49USDIPY110MHzHC49USDIPC820pFC0603C820pFC0603R510K-NCR0603R510K-NCR0603R13.3KR0603R13.3KR0603adStarD16MF512U1adStarQFP40P1600X1600X120-128MadStarD16MF512U1adStarQFP40P1600X1600X120-128MADC_VREF1ADC_VIN32ADC_VIN23ADC_VIN14ADC_VIN05ADC_GND6ADC_VDD337USB_VDD338USB_DP9USB_DM10USB_GND11PLL0_AVDD1812PLL0_VCTR13PLL0_AGND14PLL1_AVDD1815PLL1_VCTR16PLL1_AGND17LDO_VDD3318LDO_VBG19LDO_OUT1820LDO_GND21CORE_VDD1822CORE_GND23IO_VDD3324IO_GND25XOUT26XIN27P0.0/SPWM2L_P/SPI0_nCS/TWI_SCL28P0.1/SPWM2L_N/SPI0_MISO/TWI_SDA29P0.2/SPWM2R_P/SPI0_MOSI/SRAM_nCS130P0.3/SPWM2R_N/SPI0_SCK/SRAM_nCS231IO_GND32P0.7/SPWM3R_N/TAP_SEL/UART_RX433nTEST34P1.1/UART_RX0/I2S0_SDI/TWI_SDA35P1.0/UART_TX0/I2S_MCLK/TWI_SCL36P1.2/NF_nCS/SRAM_nCS137IO_VDD3338P1.3/NF_ALE/SDHC_CMD/SRAM_nCS339P1.4/NF_CLE/SDHC_CLK/SRAM_nBE140P1.5/NF_nWE/I2S0_SCLK/SRAM_A1741P1.6/NF_nRE/I2S0_LRCLK/SRAM_A1842IO_VDD3343CORE_GND44CORE_VDD1845P0.4/SPWM3L_P/FLASH_nCS/CAP_IN146P0.5/SPWM3L_N/FLASH_D1/TM_OUT147P0.6/SPWM3R_P/FLASH_D2/UART_TX448P1.7/NF_nBUSY/I2S0_SDO/SRAM_nWAIT49IO_GND50P2.0/NF_D0/UART_TX3/SRAM_AD851P2.1/NF_D1/UART_RX3/SRAM_AD952P2.2/NF_D2/UART_TX4/SRAM_AD1053P2.3/NF_D3/UART_RX4/SRAM_AD1154P2.4/NF_D4/SDHC_D0/SRAM_AD1255P2.5/NF_D5/SDHC_D1/SRAM_AD1356P2.6/NF_D6/SDHC_D2/SRAM_AD1457P2.7/NF_D7/SDHC_D3/SRAM_AD1558P3.0/SRAM_AD0/SRAM_A8/CAP_IN059P3.1/SRAM_AD1/SRAM_A9/TM_OUT060IO_GND61P3.2/SRAM_AD2/SRAM_A10/UART_TX362P3.3/SRAM_AD3/SRAM_A11/UART_RX363P3.4/SRAM_AD4/SRAM_A12/CAP_IN264IO_VDD33128nRESET127P8.7/B7/SPWM3R_N/TM_OUT3126P8.6/B6/SPWM3R_P/CAP_IN3125P8.5/B5/SPWM3L_N/TM_OUT2124IO_GND123SDRAM_VDDQ33122P8.4/B4/SPWM3L_P/CAP_IN2121SDRAM_GND120P8.3/B3/SPWM2R_N/TM_OUT1119P8.2/B2/SPWM2R_P/CAP_IN1118SDRAM_VDDQ33117P9.2/I2S1_SDO/FLASH_D3/SRAM_nCS3116P9.1/I2S1_LRCLK/FLASH_CLK/TM_OUT0115P9.0/I2S1_SCLK/FLASH_D0/CAP_IN0114CORE_VDD18113CORE_GND112SDRAM_GND111P8.1/B1/SPWM2L_N/SRAM_A9110P8.0/B0/SPWM2L_P/SRAM_A8109P7.7/G7/CFG4/SRAM_A15108SDRAM_VDDQ33107P7.6/G6/CFG3/SRAM_A14106P7.5/G5/CFG2/SRAM_A13105SDRAM_GND104P7.4/G4/CFG1/SRAM_A12103P7.3/G3/CFG0/SRAM_A11102SDRAM_VDDQ33101P7.2/G2/SDHC_CLK/SRAM_A10100P7.1/G1/TDO/SRAM_nCS299P7.0/G0/TMS/SRAM_nCS198IO_GND97P6.7/R7/SDHC_D3/UART_RX296P6.6/R6/SDHC_D2/UART_TX295P6.5/R5/SDHC_D1/I2S1_SDO94P6.4/R4/SDHC_D0/I2S1_LRCLK93P6.3/R3/SDHC_CMD/I2S1_SCLK92P6.2/R2/TDI91P6.1/R1/TCK90P6.0/R0/nTRST89P5.7/LCD_CLK_OUT/UART_RX1/SRAM_A788P5.6/DISP_EN/UART_TX1/SRAM_A687P5.5/HSYNC/EIRQ1/SRAM_A586P5.4/VSYNC/EIRQ0/SRAM_A485P5.3/LCD_CLK_IN/UART_RX0/SRAM_A384P5.2/I2S0_SDO/UART_TX0/SRAM_A283P5.1/I2S0_LRCLK/SPI_MOSI1/SRAM_A182P5.0/I2S0_SCLK