ASIC-全部笔试题

1)Writeaverilogcodetoswapcontentsoftworegisterswithandwithoutatemporaryregister?Withtempreg;always@(posedgeclock)begintemp=b;b=a;a=temp;endWithouttempreg;always@(posedgeclock)begina=b;b=a;end2)Differencebetweenblockingandnon-blocking?(Veriloginterviewquestionsthatismostcommonlyasked)TheVeriloglanguagehastwoformsoftheproceduralassignmentstatement:blockingandnon-blocking.Thetwoaredistinguishedbythe=and=assignmentoperators.Theblockingassignmentstatement(=operator)actsmuchlikeintraditionalprogramminglanguages.Thewholestatementisdonebeforecontrolpassesontothenextstatement.Thenon-blocking(=operator)evaluatesalltheright-handsidesforthecurrenttimeunitandassignstheleft-handsidesattheendofthetimeunit.Forexample,thefollowingVerilogprogram//testingblockingandnon-blockingassignmentmoduleblocking;reg[0:7]A,B;initialbegin:init1A=3;#1A=A+1;//blockingproceduralassignmentB=A+1;$display(Blocking:A=%bB=%b,A,B);A=3;#1A=A+1;//non-blockingproceduralassignmentB=A+1;#1$display(Non-blocking:A=%bB=%b,A,B);endendmoduleproducesthefollowingoutput:Blocking:A=00000100B=00000101Non-blocking:A=00000100B=00000100Theeffectisforallthenon-blockingassignmentstousetheoldvaluesofthevariablesatthebeginningofthecurrenttimeunitandtoassigntheregistersnewvaluesattheendofthecurrenttimeunit.Thisreflectshowregistertransfersoccurinsomehardwaresystems.blockingproceduralassignmentisusedforcombinationallogicandnon-blockingproceduralassignmentforsequentialTellmeaboutverilogfileI/O?OPENAFILEintegerfile;file=$fopenr(filename);file=$fopenw(filename);file=$fopena(filename);Thefunction$fopenropensanexistingfileforreading.$fopenwopensanewfileforwriting,and$fopenaopensanewfileforwritingwhereanydatawillbeappendedtotheendofthefile.Thefilenamecanbeeitheraquotedstringoraregholdingthefilename.Ifthefilewassuccessfullyopened,itreturnsanintegercontainingthefilenumber(1..MAX_FILES)orNULL(0)iftherewasanerror.Notethatthesefunctionsarenotthesameasthebuilt-insystemfunction$fopenwhichopensafileforwritingby$fdisplay.ThefilesareopenedinCwith'rb','wb',and'ab'whichallowsreadingandwritingbinarydataonthePC.The'b'isignoredonUnix.CLOSEAFILEintegerfile,r;r=$fcloser(file);r=$fclosew(file);Thefunction$fcloserclosesafileforinput.$fclosewclosesafileforoutput.ItreturnsEOFiftherewasanerror,otherwise0.Notethatthesearenotthesameas$fclosewhichclosesfilesforwriting.3)Differencebetweentaskandfunction?Function:Afunctionisunabletoenableataskhoweverfunctionscanenableotherfunctions.Afunctionwillcarryoutitsrequireddutyinzerosimulationtime.(Theprogramtimewillnotbeincrementedduringthefunctionroutine)Withinafunction,noevent,delayortimingcontrolstatementsarepermittedIntheinvocationofafunctiontheirmustbeatleastoneargumenttobepassed.Functionswillonlyreturnasinglevalueandcannotuseeitheroutputorinoutstatements.Tasks:TasksarecapableofenablingafunctionaswellasenablingotherversionsofaTaskTasksalsorunwithazerosimulationhowevertheycanifrequiredbeexecutedinanonzerosimulationtime.Tasksareallowedtocontainanyofthesestatements.Ataskisallowedtousezeroormoreargumentswhichareoftypeoutput,inputorinout.ATaskisunabletoreturnavaluebuthasthefacilitytopassmultiplevaluesviatheoutputandinoutstatements.4)Differencebetweeninterstatementandintrastatementdelay?//defineregistervariablesrega,b,c;//intraassignmentdelaysinitialbegina=0;c=0;b=#5a+c;//Takevalueofaandcatthetime=0,evaluate//a+candthenwait5timeunitstoassignvalue//tob.end//Equivalentmethodwithtemporaryvariablesandregulardelaycontrolinitialbegina=0;c=0;temp_ac=a+c;#5b=temp_ac;//Takevalueofa+catthecurrenttimeand//storeitinatemporaryvariable.Eventhoughaandc//mightchangebetween0and5,//thevalueassignedtobattime5isunaffected.end5)Whatisdeltasimulationtime?6)Differencebetween$monitor,$display&$strobe?Thesecommandshavethesamesyntax,anddisplaytextonthescreenduringsimulation.Theyaremuchlessconvenientthanwaveformdisplaytoolslikecwaves?.$displayand$strobedisplayonceeverytimetheyareexecuted,whereas$monitordisplayseverytimeoneofitsparameterschanges.Thedifferencebetween$displayand$strobeisthat$strobedisplaystheparametersattheveryendofthecurrentsimulationtimeunitratherthanexactlywhereitisexecuted.TheformatstringislikethatinC/C++,andmaycontainformatcharacters.Formatcharactersinclude%d(decimal),%h(hexadecimal),%b(binary),%c(character),%s(string)and%t(time),%m(hierarchylevel).%5d,%5betc.wouldgiveexactly5spacesforthenumberinsteadofthespaceneeded.Appendb,h,otothetasknametochangedefaultformattobinary,octalorhexadecimal.Syntax:$display(format_string,par_1,par_2,...);$strobe(format_string,par_1,par_2,...);$monitor(format_string,par_1,par_2,...);7)WhatisdifferencebetweenVerilogfullcaseandparallelcase?Afullcasestatementisacasestatementinwhichallpossiblecase-expressionbinarypatternscanbematchedtoacaseitemortoacasedefault.Ifacasestatementdoesnotincludeacasedefaultandifitispossibletofindabinarycaseexpressionthatdoesnotmatchanyofthedefinedcaseitems,thecasestatementisnotfull.Aparallelcasestatementisacasestatementinwhichitisonlypossibletomatchacaseexpressiontooneandonlyonecaseitem.Ifitispossibletofindacase