高性能ADC和DAC设计技术2

©GeorgesGielen-KULeuven1Lecture5–High-performanceA/DandD/Aconverterarchitectures(2)[e-mail]©GeorgesGielen-KULeuven2ImprovedADCarchitectures•limitthenumberofcomparators:splitconversionincoarseandfinepartsMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven3Two-step(orsubranging)A/Dconverter(1)•areaandpowersubstantiallylowerthanflash•lowerspeed•suitedforresolutions8bit•inter-stageS&Hwoulddecouplethetwostages(butintroduceslatency)©GeorgesGielen-KULeuven4Two-step(orsubranging)A/Dconverter(2)•witherrorcorrectionforout-of-rangedetectionatsecondADCMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven5PipelinedA/Dconverter(1)•arbitrarynumberofstageswithkbit/stage•allstagesoperateindependentlyduetoT/H:higherthroughputbutlatencyofNclockperiods•digitalerrorcorrectionneededfor12bit•speedlimitedby2kamplifier++-Stage1k-bitADCStagejStageNVin......k-bitDACS/HAvk-bitT©GeorgesGielen-KULeuven6PipelinedA/Dconverter(2)•arbitrarycombinationsofbitsperstageMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven7PipelinedA/Dconverter(3)•example:1bit/stage©GeorgesGielen-KULeuven8Needforerrorcorrection(1)•errorsduetooffsetandgainerrorMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven9Needforerrorcorrection(2)•solution:1.5bitperstage(2comparators)©GeorgesGielen-KULeuven10Needforerrorcorrection(3)•examplecorrection:1.5bitperstageMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven11Improvedarchitectures•reduce#comparators:splitconversionincoarseandfineparts©GeorgesGielen-KULeuven12InterpolatingA/Dconverter•eliminatinginputamplifiersreducesinputcapacitance•createmissingsignalsthroughinterpolation•onlyzerocrossingscontaininformationrefirefi+1refi+2refi+3outiouti+1outi+2outi+3outiouti+3ininrefirefi+3Interpolationint=aouti+(1-a)outi+3inarefi+(1-a)refi+3vinrefirefi+1refi+2refi+3outiouti+1outi+2outi+3outiouti+1outi+2outi+3ininininrefirefi+1refi+2refi+3FlashvinMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven13Resistiveinterpolation•resistorsgenerateintermediateoutputs•resistersaverageouterrorsofpreamplifiersrefirefi+3outiouti+3outiouti+3ininrefirefi+3outi+2inouti+2vin©GeorgesGielen-KULeuven14InterpolatingADCwithresistiveinterpolationI=4MixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven15InterpolatingA/Dconverter•forfastoperationdelaytoalllatchesmustbeequal,whichispossiblebyaddingextraresistors•interpolationalsopossiblewithcurrentsorcharges©GeorgesGielen-KULeuven16FoldingcharacteristicFR=2FR=4MixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven17FoldingA/Dconverter(1)•reducesthenumberofcomparatorsbyusingafoldingblock,buthassameinputcapacitanceasflash•coarsequantisationofflashtype•analogpreprocessingforfinequantisationfoldingblockrealisedbycross-connectionofdifferentialpairsfoldingcircuitfineADCcoarseADCLSBsMSBsvinfoldedsignalfoldedsignalvin©GeorgesGielen-KULeuven18FoldingA/Dconverter(2)•n=4;FR=4MixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven19Realisationoffoldingblock•crossconnectionofdifferentialpairscreatesakindof“OR”functionspeedofA/Dconverterlimitedbyspeedoffoldingblocksintheendthesamenumberofdifferentialpairsandthuscapacitanceasflash©GeorgesGielen-KULeuven20Folding/interpolatingA/Dconverter•combinationoffoldingandinterpolation•reducesbothinputcapacitanceand#comparatorsMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven21Folding/interpolatingA/Dconverter•n=4FR=4I=2©GeorgesGielen-KULeuven22Time-parallelA/Dconverter•principle:increasemaximalthroughputbymultiplexingmultipleparallelADC’sproblems:inputS&H,tonesbychannelmismatchMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven23Time-basedA/DconvertersTDCclk•convertinputsignalintotimeinformatione.g.usingsawtoothtocreatePWMsignal•converttimeinformationintodigitalformusingTDCdigitallymeasuresthelocationofthesignaledgesoutputisdigitalvalueoftheanaloginputgoodresolutionpossibleinnanometerCMOS©GeorgesGielen-KULeuven24Stateoftheart:BWversusSNDRB.Murmann,ADCPerformanceSurvey1997-2011,[Online].Available:~murmann/adcsurvey.html20304050607080901001101201041061081010SNDR[dB]BW[Hz]FlashFoldingTwo-StepPipeline(Interleaved)Pipeline(1Channel)SAROther100fsrmsJitterMixedSignalCircuits-Theoryimec©2016©GeorgesGielen-KULeuven25Stateoftheart:FOMversusSFDRB.Murmann,ADCPerformanceSurvey1997-2011,[Online].Available:~murmann/adcsurvey.html203040506070809010011012010-1210-1010-810-6SNDR[dB]P/fs[pJ]FlashFoldingTwo-StepPipeline(Interleaved)Pipeline(1Channel)SAROtherFOM=100fJ/conv-stepMixedSignalCircuits-Theoryimec©2016