ICC-hier-meth-overview

PredictableSuccessICCompilerHierarchicalMethodologySynopsysJuly5,2007©2007Synopsys,Inc.(2)PredictableSuccessContents¾ICCompilerHierarchicalMethodologyOverview•DesignPlanning•BlockImplementation•ILM•TopLevelImplementation•AdvancedHierarchicalFlowSupport©2007Synopsys,Inc.(3)PredictableSuccessICCompilerHierarchicalDesignFlowMilkywayMilkywaySignoffSignoffDesignCompilerDesignCompilerICCompilerICCompilerGalaxyGalaxyFloorplanningPowerPlanningDesignFeasibilityPhysicalHierarchyCreationReadBlockModelsTopImplementationBlockImplementationBlockModelingHier.DesignPlanningHier.DesignModelingChipIntegration©2007Synopsys,Inc.(4)PredictableSuccessICCDesignplanningDesignPrototyping(Timing,Routability,PowerIntegrity)DetailedFloorplaningPhysicalHierarchyCreationTopCellFloorplan/PowerPlanICCompilerHierarchicalMethodologyDesignGateLevelNetlistTimingConstraintsFloorplanConstraintsLogicalandPhysicalLibraryBlockCellFloorplan/PowerPlanTimingBudgetsDetailImplementationDetailImplementation©2007Synopsys,Inc.(5)PredictableSuccessICCompilerHierarchicalMethodologyICCBlock-levelImplementationClock_optCompletedBlockICCTop-levelImplementationPlace_optRoute_optPropagateConstraintsClock_optonILMRoute_optonILMReplaceCELwtFRAMPlace_optonILMILMModelgenerationFRAMModelgeneration***EarlyExplorationusingILMLoadBlock&SDCLoadTOP&ILM****optional©2007Synopsys,Inc.(6)PredictableSuccessHierarchicalDesignDatabaseManagementMWDesignLibCELReferenceMWDesignLibCELCELCELDesignPlanningMWDesignLibCELMWDesignLibCELBlockImplementationSplitDesignTopABTopABTopMWDesignLibCELMWDesignLibCELABMWDesignLibCEL/FRAM/ILMMWDesignLibCEL/FRAM/ILMABMWDesignLibCEL/FRAM/ILMAMWDesignLibCEL/FRAM/ILMBTopTopLevelImplementation©2007Synopsys,Inc.(7)PredictableSuccessContents•ICCompilerHierarchicalMethodologyOverview¾DesignPlanning•BlockImplementation•ILM•TopLevelImplementation•AdvancedHierarchicalFlowSupport©2007Synopsys,Inc.(8)PredictableSuccessICCDesignPlanningVFPlacement/RefinementPowerNetworkSynthesis/AnalysisPrototypeRoutePlanGroupShapingVirtualFlatPlacementInitializeFloorplanReadNetlist/DesignConstraintscreate_mw_libopen_mw_libread_verilog_to_cel$netlist_fileset_tlu_plus_filesread_sdc$sdc_fileread_io_constraintsio.tdfinitialize_floorplanset_fp_placement_strategyreport_fp_placement_strategycreate_fp_placementcreate_plan_groupshape_fp_blocksCreate_fp_plan_group_paddingcreate_fp_placementconnect_pg_netsset_fp_rail_constraints#set_fp_block_ring_constraints#set_fp_rail_region_constraintssynthesize_fp_railCommit_fp_rail#preroute_standard_cellsset_parameter-namereadPlanGroup-value1route_fp_proto…©2007Synopsys,Inc.(9)PredictableSuccessICCDesignPlanningSave/SplitDesignsRefinePinAssignmentCommitHierarchyPinAssignmentSetPinAssignmentConstraintsTimingBudgetingInPlaceOptimizationreport_timingset_dont_touch_placement{hard_macro_list}optimize_fp_timingset_fp_pin_constraints-allow_feedthroughs[off|on]…report_fp_pin_constraintsset_parameter-namereadPlanGroup-value1route_globalanalyze_fp_routing–finalizeextract_rcreport_timingcheck_fp_timing_environmentallocate_fp_budgetscommit_fp_plan_groupscheck_fp_pin_assignmentcheck_fp_pin_alignmentplace_fp_pinssave_mw_cel–hierarchysplit_mw_lib©2007Synopsys,Inc.(10)PredictableSuccessContents•ICCompilerHierarchicalMethodologyOverview•DesignPlanning¾BlockImplementation•ILM•TopLevelImplementation•AdvancedHierarchicalFlowSupport©2007Synopsys,Inc.(11)PredictableSuccessICCBlockImplementationFRAMGenerationILMGenerationRoute_optClock_optPlace_optLoadDesign/SDCopen_mw_celset_tlu_plus_filecheck_designset_fix_multiple_port_nets–allremove_sdcread_sdcremove_propagated_clock[all_clocks]set_dont_touch_placement{hard_macro_list}set_pnet_optionsset_ideal_network[all_fanout-flat-clock_tree]place_optclock_opt-only_cts-no_clock_routeremove_ideal_network[all_fanout-flat-clock_tree]set_fix_hold[all_clocks]clock_opt-only_psyn-no_clock_routeroute_group-all_clock_netsset_si_optionsset_route_optionsroute_optsave_mw_celcreate_ilm–keep_parasiticcreate_macro_fram©2007Synopsys,Inc.(12)PredictableSuccessContents•ICCompilerHierarchicalMethodologyOverview•DesignPlanning•BlockImplementation¾ILM•TopLevelImplementation•AdvancedHierarchicalFlowSupport©2007Synopsys,Inc.(13)PredictableSuccessILMConceptABCLKXYABCLKXYOriginalblockILM©2007Synopsys,Inc.(14)PredictableSuccessDefaultILMCreationBuffersGatesRegistersLegendPartofILMnetlistNotpartofILMnetlistInClkRstOutcreate_ilm©2007Synopsys,Inc.(15)PredictableSuccessILMCreationwith–auto_ignoreBuffersGatesRegistersLegendPartofILMnetlistNotpartofILMnetlistInClkRstOutcreate_ilm–auto_ignore©2007Synopsys,Inc.(16)PredictableSuccessILM–auto_ignore–keep_boundary_cellsBuffersGatesRegistersLegendPartofILMnetlistNotpartofILMnetlistInClkRstOutcreate_ilm–auto_ignore–keep_boundary_cells©2007Synopsys,Inc.(17)PredictableSuccessILMSideloadDescriptionU1U2n1Out1Out1Out2Out3ILMBoundaryNetsInterfaceLogicModelNetn3BoundarySide-LoadCellSide-LoadCellU0Reg1Reg2Reg3n2•Bydefault,‘create_ilm’onlyincludesboundarysideloadsintheILMmodel(i.e.U2above,butnotU1).(Allotherobjectsexceptnetsn2andn