基于CPLD的USB线设计

[键入文字]1基于CPLD的USB下载线设计学生姓名学号专业名称电子科学与技术指导教师姓名申请学位级别学位授予单位论文提交日期摘要随着片上系统时代的到来，包括复杂可编程逻辑器件和现场可编程门阵列的可编程逻辑器件，应用越来越广泛。USBblaster的使用也显的越来越有必要。与传统的并口、串口下载电缆相比，USBblaster在下载速度和灵活性上都有很大优势。而且由于其结构相对简单，所以它的体积较小，容易携带。USBblaster所用到的芯片价格便宜，容易被广大用户接受使用。本文所设计的USBblaster硬件主要分为两部分，即USB控制芯片及CPLD器件。USB控制芯片将主机发送给CPLD器件的数据转化为8位并行数据，CPLD器件再将其转化为JTAG时序，发送给外设。软件方面，软件主要完成的功[键入文字]2能是将USB时序转化成JTAG时序。CPLD应用状态机的原理，将CPLD与USB控制芯片之间的数据传输，分为接受状态机和发送状态机两个状态，它们的功能是控制如何接受和发送数据。经实验证明，在下载速度上USBblaster下载FPGA配置程序是ByteblasterII的6倍。而且由于USBblaster采用USB接口模式，可以更好的适应现在计算机的发展.。关键字：CPLD，USB，状态机[键入文字]3ABSTRUCTAlongwiththeSystemonChiptimearrival，includingCPLDandFPGA，theapplicationismoreandmorewidespread。Withtheparallelportandserialportdownloadcablecompared,USBblasterhasgreatadvantagesindownloadspeedandflexibility。Andbecauseofsimplestructure,it'ssmallandeasytocarry.AlotofuserscanacceptUSBblastereasily,becausethatthechipswhichtheUSBblasterusedarecheapTherearetwomainpartsinhardware。TheyareUSBcontrollerchipsandCPLDdevices.USBcontrollerchipstransformthedatewhichhostsentintoeightparalleldata。ThenCPLDtransformthedateintoJTAGtimingandsentittoperipherals.SoftwaremainfunctionisthatitcantransformtheUSBtimingintotheJTAGtiming.CPLDusestatemachinefordatatransmission。ThereareacceptingstatemachineandSendingstatemachine。Theycancontrolthathowthedatasendorreceive.USBblasterisalmostsixtimesasfastasByteblasterIIwhenitdownloadFPGAconfigurationprocess.AndbecausethatUSBblasterisUSBmode,itcanbetteradapttothedevelopmentofthecomputer。Keywords:CPLD,USB,Statemachine[键入文字]4目录第一章绪论....................................................................................................................................61.1课题的背景和研究意义......................................................................................................61.2下载电缆发展现状..............................................................................................................8第二章系统总体设计..................................................................................................................102.1硬件总体设计....................................................................................................................102.2软件总体设计....................................................................................................................11第三章硬件电路设计...........................................................................................................123.1电路器件介绍....................................................................................................................123.1.1USB器件FT245BM...................................................................................................123.1.2CPLD器件EPM3064.................................................................................................143.2系统硬件设计..................................................................................................................163.2.1USB接口电路............................................................................................................163.2.2EPM3064与FT245BM的接口实现..........................................错误!未定义书签。3.2.3电压缓冲部分.............................................................................错误!未定义书签。3.3PCB版图设计........................................................................................错误!未定义书签。3.3.1容性负载.....................................................................................错误!未定义书签。3.3.2电源............................................................................................错误!未定义书签。3.3.3带电插拔......................................................................................错误!未定义书签。3.3.4PCB图..........................................................................................错误!未定义书签。第四章系统软件设计.....................................................................................错误!未定义书签。4.1系统平台建立.......................................................................................错误!未定义书签。4.1.1VHDL语言....................................................................................错误!未定义书签。4.1.2CPLD简介....................................................................................错误!未定义书签。4.1.3JTAG协议..................................................................................错误!未定义书签。4.1.4设计软件QuartusII...............................................................错误!未定义书签。[键入文字]54.2基于VCP的PC机端软件设计.............................................................错误!未定义书签。4.3CPLD收发状态机设计........................................................................错误!未定义书签。4.3.1状态机.......................................................................................错误!未定义书签。4.3.2CPLD状态机设计........................................................................错误!未定义书签。4.3.3接收状态机.................................................................................错误!未定义书签。4.3.4发送状态机.................................................................................错误!未定义书签。4.3.5状态图.......................................................................................错误