SST39VF010-70-4I-NHE中文资料

©2005SiliconStorageTechnology,Inc.S71150-09-0001/061TheSSTlogoandSuperFlashareregisteredtrademarksofSiliconStorageTechnology,Inc.MPFisatrademarkofSiliconStorageTechnology,Inc.Thesespecificationsaresubjecttochangewithoutnotice.DataSheet512Kbit/1Mbit/2Mbit/4Mbit(x8)Multi-PurposeFlashSST39LF512/SST39LF010/SST39LF020/SST39LF040SST39VF512/SST39VF010/SST39VF020/SST39VF040FEATURES:•Organizedas64Kx8/128Kx8/256Kx8/512Kx8�SingleVoltageReadandWriteOperations–3.0-3.6VforSST39LF512/010/020/040–2.7-3.6VforSST39VF512/010/020/040�SuperiorReliability–Endurance:100,000Cycles(typical)–Greaterthan100yearsDataRetention�LowPowerConsumption(typicalvaluesat14MHz)–ActiveCurrent:5mA(typical)–StandbyCurrent:1µA(typical)�Sector-EraseCapability–Uniform4KBytesectors�FastReadAccessTime:–45nsforSST39LF512/010/020/040–55nsforSST39LF020/040–70and90nsforSST39VF512/010/020/040�LatchedAddressandData�FastEraseandByte-Program:–Sector-EraseTime:18ms(typical)–Chip-EraseTime:70ms(typical)–Byte-ProgramTime:14µs(typical)–ChipRewriteTime:1second(typical)forSST39LF/VF5122seconds(typical)forSST39LF/VF0104seconds(typical)forSST39LF/VF0208seconds(typical)forSST39LF/VF040�AutomaticWriteTiming–InternalVPPGeneration�End-of-WriteDetection–ToggleBit–Data#Polling�CMOSI/OCompatibility�JEDECStandard–FlashEEPROMPinoutsandcommandsets�PackagesAvailable–32-leadPLCC–32-leadTSOP(8mmx14mm)–48-ballTFBGA(6mmx8mm)–34-ballWFBGA(4mmx6mm)for1Mand2M�Allnon-Pb(lead-free)devicesareRoHScompliantPRODUCTDESCRIPTIONTheSST39LF512/010/020/040andSST39VF512/010/020/040are64Kx8,128Kx8,256Kx8and5124Kx8CMOSMulti-PurposeFlash(MPF)manufacturedwithSST’sproprietary,highperformanceCMOSSuperFlashtechnology.Thesplit-gatecelldesignandthick-oxidetun-nelinginjectorattainbetterreliabilityandmanufacturabilitycomparedwithalternateapproaches.TheSST39LF512/010/020/040deviceswrite(ProgramorErase)witha3.0-3.6Vpowersupply.TheSST39VF512/010/020/040deviceswritewitha2.7-3.6Vpowersupply.ThedevicesconformtoJEDECstandardpinoutsforx8memories.FeaturinghighperformanceByte-Program,theSST39LF512/010/020/040andSST39VF512/010/020/040devicesprovideamaximumByte-Programtimeof20µsec.ThesedevicesuseToggleBitorData#Pollingtoindi-catethecompletionofProgramoperation.Toprotectagainstinadvertentwrite,theyhaveon-chiphardwareandSoftwareDataProtectionschemes.Designed,manufac-tured,andtestedforawidespectrumofapplications,theyareofferedwithaguaranteedtypicalenduranceof10,000cycles.Dataretentionisratedatgreaterthan100years.TheSST39LF512/010/020/040andSST39VF512/010/020/040devicesaresuitedforapplicationsthatrequireconvenientandeconomicalupdatingofprogram,configu-ration,ordatamemory.Forallsystemapplications,theysignificantlyimprovesperformanceandreliability,whilelow-eringpowerconsumption.TheyinherentlyuselessenergyduringEraseandProgramthanalternativeflashtechnolo-gies.Thetotalenergyconsumedisafunctionoftheappliedvoltage,current,andtimeofapplication.Sinceforanygivenvoltagerange,theSuperFlashtechnologyuseslesscurrenttoprogramandhasashortererasetime,thetotalenergyconsumedduringanyEraseorProgramoper-ationislessthanalternativeflashtechnologies.Thesedevicesalsoimproveflexibilitywhileloweringthecostforprogram,data,andconfigurationstorageapplications.TheSuperFlashtechnologyprovidesfixedEraseandPro-gramtimes,independentofthenumberofErase/Programcyclesthathaveoccurred.Thereforethesystemsoftwareorhardwaredoesnothavetobemodifiedorde-ratedasisnecessarywithalternativeflashtechnologies,whoseEraseandProgramtimesincreasewithaccumulatedErase/Pro-gramcycles.Tomeetsurfacemountrequirements,theSST39LF512/010/020/040andSST39VF512/010/020/040devicesareofferedin32-leadPLCCand32-leadTSOPpackages.TheSST39LF/VF010andSST39LF/VF020arealsoofferedina48-ballTFBGApackage.SeeFigures1,2,3,and4forpinassignments.SST39LF/VF512/010/020/0403.0&2.7V512Kb/1Mb/2Mb/4Mb(x8)MPFmemories2DataSheet512Kbit/1Mbit/2Mbit/4MbitMulti-PurposeFlashSST39LF512/SST39LF010/SST39LF020/SST39LF040SST39VF512/SST39VF010/SST39VF020/SST39VF040©2005SiliconStorageTechnology,Inc.S71150-09-0001/06DeviceOperationCommandsareusedtoinitiatethememoryoperationfunc-tionsofthedevice.Commandsarewrittentothedeviceusingstandardmicroprocessorwritesequences.Acom-mandiswrittenbyassertingWE#lowwhilekeepingCE#low.TheaddressbusislatchedonthefallingedgeofWE#orCE#,whicheveroccurslast.ThedatabusislatchedontherisingedgeofWE#orCE#,whicheveroccursfirst.ReadTheReadoperationoftheSST39LF512/010/020/040andSST39VF512/010/020/040deviceiscontrolledbyCE#andOE#,bothhavetobelowforthesystemtoobtaindatafromtheoutputs.CE#isusedfordeviceselection.WhenCE#ishigh,thechipisdeselectedandonlystandbypowerisconsumed.OE#istheoutputcontrolandisusedtogatedatafromtheoutputpins.Thedatabusisinhighimped-ancestatewheneitherCE#orOE#ishigh.RefertotheReadcycletimingdiagramforfurtherdetails(Figure5).Byte-ProgramOperationTheSST39LF512/010/020/040andSST39VF512/010/020/040areprogrammedonabyte-by-bytebasis.Beforeprogramming,thesectorwherethebyteexistsmustbefullyerased.TheProgramoperationisaccomplishedinthreesteps.Thefirststepisthethree-byteloadsequenceforSoftwareDataPr