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IBM小型机简介•IBMPower6p570–Generaldescription–ArchitectureandtechnicalOverview•IBMPower5p590–Generaldescription–ArchitectureandtechnicalOverviewSystemspecifications单个CentralElectronicsComplex(CEC)enclosure的规格:Physicalpackage可以使用1-4个buildingblockenclosures每个CECdrawerbuildingblocks高4UFrontViewBackViewPower5系列SystemfeaturesThefullsystemconfigurationismadeoffourCECbuildingblocks.Itfeatures:2-,4-,8-,12-,16-,and32-coreconfigurationsutilizingthePOWER6chiponuptoeightdualcoreprocessorcards,oreightdual-corePOWER6dual-chipprocessorcards.32MBofL3cache,8MBofL2cache.3.5,4.2,or4.7GHz.Upto192GBDDR2memoryperenclosure,768GBDDR2maxpersystem.Availablememoryfeaturesare667MHz,533MHz,or400MHzdependingonmemorydensity.Upto6SASDASDdiskdrivesperenclosure,24maxpersystem.6PCIslotsperenclosure:4PCIe,2PCI-X;24PCIpersystem:16PCIe,8PCI-X.Upto2GX+adaptersperenclosure;8persystemOnehot-plugslim-linemediabayperenclosure,4maxpersystem.•IBMPower6p570–Generaldescription–ArchitectureandtechnicalOverview•IBMPower5p590–Generaldescription–ArchitectureandtechnicalOverviewOverviewThePOWER6processorCompatibilityof64-bitarchitectureBinarycompatibilityforallPOWERandPowerPCapplicationcodelevelSupportofpartitionmigrationSupportofvirtualizedpartitionmemorySupportoffourpagesizes:4KB,64KB,16MB,and16GBHighfrequencyoptimizationDesignedtooperateatmaximumspeedof5GHzSuperscalarcoreorganizationSimultaneousMultithreading:twothreadsProcessorcardsInthe570,thePOWER6processors,associatedL3cachechip,andmemoryDIMMsarepackagedinprocessorcards.AsingleCECmayhaveoneortwoprocessorcardsinstalled.Theyareinterfacedto12memoryslots,whereaseachmemoryDIMMhasitsownmemorybufferchipandareinterfacedinapoint-to-pointconnection.I/Oconnectstothe570processormoduleusingtheGX+bus.ProcessordrawerinterconnectcablesTheSMPfabricbusthatconnectstheprocessorsofseparate570buildingblocksisroutedontheinterconnectcablethatisroutedexternaltothebuildingblocks.Theflexiblecableattachesdirectlytotheprocessorcards,atthefrontofthe570buildingblock,andisroutedbehindthefrontcovers(bezels)ofthe570buildingblocks.Memorysubsystem-FullybufferedDIMMFBD是一种用于提高可靠性、速度和密度的内存技术。Memorysubsystem-MemoryplacementsrulesFirstquadincludesJ0A,J0B,J0C,andJ0DmemoryslotsSecondquadincludesJ1A,J1B,J1C,andJ1DmemoryslotsThirdquadincludesJ2A,J2B,J2C,andJ2DmemoryslotsSystembuses-I/ObusesandGX+cardEachPOWER6processorprovidesaGX+buswhichisusedtoconnecttoanI/OsubsystemorFabricInterfacecard.Inafullypopulated570,therearetwoGX+buses,onefromeachprocessor.OptionalDualportRIO-2I/OHub(FC1800)andDualport12xChannelAttach(FC1802)adaptersthatareinstalledintheGX+slotsareusedforexternalDASDandIOdrawerexpansion.Systembuses-ServiceprocessorbusTheServiceProcessor(SP)flexcableisattherearofthesystemandisusedforSPcommunicationbetweenthesystemdrawers.InternalI/OsubsystemTheinternalI/OsubsystemresidesonthesystemplanarwhichsupportsamixtureofbothPCIeandPCI-Xslots.InternalstorageThe570internaldisksubsystemisdrivenbythelatestDASDinterfacetechnologySerialAttachedSCSI(SAS).ThisinterfaceprovidesenhancementsoverparallelSCSIwithitspointtopointhighfrequencyconnections.TheSAScontrollerhaseightSASports,fourofthemareusedtoconnecttotheDASDdrivesandonetoamediadevice.TheDASDbackplaneimplementstwoSASportexpandersthattakefourSASportsfromtheSAScontrollerandexpandsitto12SASports.These12portsallowforredundantSASportstoeachofthesixDASDdevices.TheDASDbackplaneprovidesthefollowingfunctions:supportssix3.5inchesSASDASDdevicescontainstwoSASportexpandersforredundantSASpathstotheSASdevicesSASpassthruconnectiontomediasbackplaneExternalI/OsubsystemsEachGX+buscanbepopulatedwithaGX+adaptercardthataddsmoreRIO-GportstoconnectexternalI/Odrawers.•IBMPower6p570–Generaldescription–ArchitectureandtechnicalOverview•IBMPower5p590–Generaldescription–ArchitectureandtechnicalOverviewSystemframesp5-590systemsarebasedonthesame24-inchwide,42EIAheightframeInsidethisframealltheservercomponentsareplacedinpredeterminedpositions.SystemspecificationsPhysicalpackage•IBMPower6p570–Generaldescription–ArchitectureandtechnicalOverview•IBMPower5p590–Generaldescription–ArchitectureandtechnicalOverviewOverviewSystemdesignBoththep5-590andp5-595serversarebasedonamodulardesign,whereallcomponentsaremountedin24-inchracks.Insidethisrack,alltheservercomponentsareplacedinspecificpositions.Thisdesignandmechanicalorganizationofferadvantagesinoptimizationoffloorspaceusage.Therearethreemajorsubsystems:TheCentralElectronicsComplex(CEC)ThepowersubsystemTheI/OsubsystemCentralElectronicsComplexTheCentralElectronicsComplexisan18EIAunitdrawerthathouses:Onetofourprocessorbooks(nodes)TheprocessorbookcontainsthePOWER5+orPOWER5processors,theL3cachelocatedinmulti-chipmodules,memory,andRIO-2attachmentcards.CECbackplane(double-sidedpassivebackplane)thatservesasthesystemcomponentmountingunitProcessorbooksplugintothefrontsideofthebackplane.Thenodedistributedconverterassemblies(DCA)plugintothebacksideofthebackplane.TheDCAsarethepowersuppliesfortheindividualprocessorbooks.Afabricbusstructureonthebackplaneboar
本文标题:IBM小型机硬件架构
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