K60_GPIO头文件分析

[cpp]viewplaincopyprint?1./*----------------------------------------------------------------------------2.--PORT3.----------------------------------------------------------------------------*/4.5./**6.*@addtogroupPORT_PeripheralPORT7.*@{8.*/9.10./**PORT-Peripheralregisterstructure*/11.typedefstructPORT_MemMap{12.uint32_tPCR[32];/**PinControlRegistern,arrayoffset:0x0,arraystep:0x4*/13.uint32_tGPCLR;/**GlobalPinControlLowRegister,offset:0x80*/14.uint32_tGPCHR;/**GlobalPinControlHighRegister,offset:0x84*/15.uint8_tRESERVED_0[24];16.uint32_tISFR;/**InterruptStatusFlagRegister,offset:0xA0*/17.uint8_tRESERVED_1[28];18.uint32_tDFER;/**DigitalFilterEnableRegister,offset:0xC0*/19.uint32_tDFCR;/**DigitalFilterClockRegister,offset:0xC4*/20.uint32_tDFWR;/**DigitalFilterWidthRegister,offset:0xC8*/21.}volatile*PORT_MemMapPtr;22.23./*----------------------------------------------------------------------------24.--PORT-Registeraccessormacros25.----------------------------------------------------------------------------*/26.27./**28.*@addtogroupPORT_Register_Accessor_MacrosPORT-Registeraccessormacros29.*@{30.*/31.32.33./*PORT-Registeraccessors*/34.#definePORT_PCR_REG(base,index)((base)-PCR[index])35.#definePORT_GPCLR_REG(base)((base)-GPCLR)36.#definePORT_GPCHR_REG(base)((base)-GPCHR)37.#definePORT_ISFR_REG(base)((base)-ISFR)38.#definePORT_DFER_REG(base)((base)-DFER)39.#definePORT_DFCR_REG(base)((base)-DFCR)40.#definePORT_DFWR_REG(base)((base)-DFWR)41.42./**43.*@}44.*//*endofgroupPORT_Register_Accessor_Macros*/45.46.47./*----------------------------------------------------------------------------48.--PORTRegisterMasks49.----------------------------------------------------------------------------*/50.51./**52.*@addtogroupPORT_Register_MasksPORTRegisterMasks53.*@{54.*/55.56./*PCRBitFields*/57.#definePORT_PCR_PS_MASK0x1u58.#definePORT_PCR_PS_SHIFT059.#definePORT_PCR_PE_MASK0x2u60.#definePORT_PCR_PE_SHIFT161.#definePORT_PCR_SRE_MASK0x4u62.#definePORT_PCR_SRE_SHIFT263.#definePORT_PCR_PFE_MASK0x10u64.#definePORT_PCR_PFE_SHIFT465.#definePORT_PCR_ODE_MASK0x20u66.#definePORT_PCR_ODE_SHIFT567.#definePORT_PCR_DSE_MASK0x40u68.#definePORT_PCR_DSE_SHIFT669.#definePORT_PCR_MUX_MASK0x700u70.#definePORT_PCR_MUX_SHIFT871.#definePORT_PCR_MUX(x)(((uint32_t)(((uint32_t)(x))PORT_PCR_MUX_SHIFT))&PORT_PCR_MUX_MASK)72.#definePORT_PCR_LK_MASK0x8000u73.#definePORT_PCR_LK_SHIFT1574.#definePORT_PCR_IRQC_MASK0xF0000u75.#definePORT_PCR_IRQC_SHIFT1676.#definePORT_PCR_IRQC(x)(((uint32_t)(((uint32_t)(x))PORT_PCR_IRQC_SHIFT))&PORT_PCR_IRQC_MASK)77.#definePORT_PCR_ISF_MASK0x1000000u78.#definePORT_PCR_ISF_SHIFT2479./*GPCLRBitFields*/80.#definePORT_GPCLR_GPWD_MASK0xFFFFu81.#definePORT_GPCLR_GPWD_SHIFT082.#definePORT_GPCLR_GPWD(x)(((uint32_t)(((uint32_t)(x))PORT_GPCLR_GPWD_SHIFT))&PORT_GPCLR_GPWD_MASK)83.#definePORT_GPCLR_GPWE_MASK0xFFFF0000u84.#definePORT_GPCLR_GPWE_SHIFT1685.#definePORT_GPCLR_GPWE(x)(((uint32_t)(((uint32_t)(x))PORT_GPCLR_GPWE_SHIFT))&PORT_GPCLR_GPWE_MASK)86./*GPCHRBitFields*/87.#definePORT_GPCHR_GPWD_MASK0xFFFFu88.#definePORT_GPCHR_GPWD_SHIFT089.#definePORT_GPCHR_GPWD(x)(((uint32_t)(((uint32_t)(x))PORT_GPCHR_GPWD_SHIFT))&PORT_GPCHR_GPWD_MASK)90.#definePORT_GPCHR_GPWE_MASK0xFFFF0000u91.#definePORT_GPCHR_GPWE_SHIFT1692.#definePORT_GPCHR_GPWE(x)(((uint32_t)(((uint32_t)(x))PORT_GPCHR_GPWE_SHIFT))&PORT_GPCHR_GPWE_MASK)93./*ISFRBitFields*/94.#definePORT_ISFR_ISF_MASK0xFFFFFFFFu95.#definePORT_ISFR_ISF_SHIFT096.#definePORT_ISFR_ISF(x)(((uint32_t)(((uint32_t)(x))PORT_ISFR_ISF_SHIFT))&PORT_ISFR_ISF_MASK)97./*DFERBitFields*/98.#definePORT_DFER_DFE_MASK0xFFFFFFFFu99.#definePORT_DFER_DFE_SHIFT0100.#definePORT_DFER_DFE(x)(((uint32_t)(((uint32_t)(x))PORT_DFER_DFE_SHIFT))&PORT_DFER_DFE_MASK)101./*DFCRBitFields*/102.#definePORT_DFCR_CS_MASK0x1u103.#definePORT_DFCR_CS_SHIFT0104./*DFWRBitFields*/105.#definePORT_DFWR_FILT_MASK0x1Fu106.#definePORT_DFWR_FILT_SHIFT0107.#definePORT_DFWR_FILT(x)(((uint32_t)(((uint32_t)(x))PORT_DFWR_FILT_SHIFT))&PORT_DFWR_FILT_MASK)108.109./**110.*@}111.*//*endofgroupPORT_Register_Masks*/112.113.114./*PORT-Peripheralinstancebaseaddresses*/115./**PeripheralPORTAbasepointer*/116.#definePORTA_BASE_PTR((PORT_MemMapPtr)0x40049000u)117./**PeripheralPORTBbasepointer*/118.#definePORTB_BASE_PTR((PORT_MemMapPtr)0x4004A000u)119./**PeripheralPORTCbasepointer*/120.#definePORTC_BASE_PTR((PORT_MemMapPtr)0x4004B000u)121./**PeripheralPORTDbasepointer*/122.#definePORTD_BASE_PTR((PORT_MemMapPtr)0x4004C000u)123./**PeripheralPORTEbasepointer*/124.#definePORTE_BASE_PTR((PORT_MemMapPtr)0x4004D000u)125.126./*----------------------------------------------------------------------------127.--PORT-Registeraccessormacros128.----------------------------------------------------------------------------*/129.130./**131.*@addtogroupPORT_Register_Accessor_MacrosPORT-Registeraccessormacros132.*@{133.*/134.135.136./*PORT-Registerinstancedefinitions*/137./*PORTA*/138.#definePORTA_PCR0PORT_PCR_REG(PORTA_BASE_PTR,0)139.#definePORTA_PCR1PORT_PCR