Advanced-PCB-design-and-layout-for-EMC---Part-5-2

AdvancedPCBdesignandlayoutforEMCPart5-Decoupling,includingburiedcapacitancetechnology(SecondPart)ByEurIngKeithArmstrongC.EngMIEEMIEEE,CherryCloughConsultantsThisisthesecondpartofKeithArmstrong’sarticlethatappearedinIssue55,EMC&ComplianceJournal,November2004.Duetoitslengthwehadtosplititbetweenthetwoissues.ThisissuecontainsSection3-Decouplingwith0V/Powerplanepairs,onwards.Thisisthefifthinaseriesofeightarticlesongood-practicedesigntechniquesforelectromagneticcompatibility(EMC)forprintedcircuitboard(PCB)designandlayout.ThisseriesisintendedforthedesignersofanyelectroniccircuitsthataretobeconstructedonPCBs,andofcourseforthePCBdesignersthemselves.Allapplicationsareasarecovered,fromhouseholdappliances;commercial,medicalandindustrialequipment;throughautomotive,railandmarinetoaerospaceandmilitary.ThesePCBtechniquesarehelpfulwhenitisdesiredto…•Savecostbyreducing(oreliminating)enclosure-levelshielding•Reducetime-to-marketandcompliancecostsbyreducingthenumberofdesigniterations•Improvetherangeofco-locatedwirelessdatacomms(GSM,DECT,Bluetooth,IEEE802.11,etc.)•Useveryhigh-speeddevices,orhighpowerdigitalsignalprocessing(DSP)•UsethelatestICtechnologies(130nmor90nmprocesses,‘chipscale’packages,etc.)Thetopicstobecoveredinthisseriesare:1.Savingtimeandcostoverall2.Segregationandinterfacesuppression3.PCB-chassisbonding4.Referenceplanesfor0Vandpower5.Decoupling,includingburiedcapacitancetechnology6.Transmissionlines7.Routingandlayerstacking,includingmicroviatechnology8.AnumberofmiscellaneousfinalissuesApreviousseriesbythesameauthorintheEMC&ComplianceJournalin1999“DesignTechniquesforEMC”[1]includedasectiononPCBdesignandlayout(“Part5–PCBDesignandLayout”,October1999,pages5–17),butonlysetouttocoverthemostbasicPCBtechniquesforEMC–theonesthatallPCBsshouldfollownomatterhowsimpletheircircuits.Thatseriesispostedonthewebandthewebversionshavebeensubstantiallyimprovedovertheinterveningyears[2].Otherarticlesandpublicationsbythisauthor(e.g.[3][4]andVolume3of[5])havealsoaddressedbasicPCBtechniquesforEMC.Thisserieswillnotrepeatthebasicdesigninformationinthesearticles–itwillbuilduponit.Liketheabovearticles,thisserieswillnotspendmuchtimeanalysingwhythesetechniqueswork,theywillfocusondescribingtheirpracticalapplicationandwhentheyareappropriate.Butthesetechniquesarewell-proveninpracticebynumerousdesignersworld-wide,andthereasonswhytheyworkareunderstoodbyacademics,sotheycanbeusedwithconfidence.Therearefewtechniquesdescribedinthisseriesthatarerelativelyunproven,andthiswillbementionedwhereappropriate.TableofContents,forthisPartoftheseriesSection1and2arecontainedinIssue55,November2004.1Introductiontodecoupling2Decouplingwithdiscretecapacitors2.1Whichcircuitlocationsneeddecaps?2.2ThebenefitsofdecapsinICsandMCMs2.3Howmuchdecouplingcapacitancetouse?2.4Typesofdecaps2.5Layoutsthatreducethesizeofthecurrentloop2.6Seriesresonancesindecaps2.7Usingferritesindecoupling2.8Splittingthedecapintotwo2.9Usingmultipledecapsinparallel2.10OtherwaystoreducedecapESLInthisissue:3Decouplingwith0V/Powerplanepairs3.1Introductiontothedecouplingbenefitsof0V/Powerplanepairs3.2Thedistributedcapacitanceofa0V/Powerplanepair3.3PCB0Vandpowerroutingwith0V/Powerplanepairs3.4Defeatingparalleldecapresonanceswhenusing0V/powerplanepairs3.5‘Cavityresonances’in0V/powerplanepairs3.6Bondingplaneswithdecapstoincreaseresonantfrequencies3.7Powerplaneislandsfedbyπfilters3.8Dampingcavityresonancepeaks3.9Thespreadinginductanceofplanes3.10The20-Hrule3.11Takingadvantageofdecapseriesresonances3.12Decapwalls3.13Other0V/Powerplanepairtechniquestoreduceemissions3.14Theburiedcapacitancetechnique4Fieldsolversforpowerbusimpedancesimulations5EMC-competentQA,changecontrol,cost-reduction6Compromises7References3.Decouplingwith0V/Powerplanepairs3.1Introductiontothedecouplingbenefitsof0V/PowerplanepairsItwasmentionedinsection2.5abovethatplacing0Vandpowerplanesareasonadjacentlayerssignificantlyincreasesthemutualinductancebetweenthem.Sincethecurrentflowsineachplaneareequalandopposite,thismutualinductancereducesthedecaps’interconnectioninductances,whichisaverygoodthing.Closerspacingbetweenthetwoplanesmeanshighermutualinductanceandlowerdecapinterconnectioninductances.Anotherconsequenceofhaving0VandpowerplanesincloseproximityonadjacentPCBlayers(knownasa0V/Powerplanepair)isthattheycreateadistributedcapacitance–andthiscanbeusedasanembeddeddecouplingcapacitancetohelpachievealowimpedancepowerbusatfrequenciesuptomanyGHz.Theuseoflargepowerplanestocreateusefulamountsofembedded,distributeddecouplingcapacitanceisthemaintopicofthissection.Asfarasthepropagationofthewanteddigitalandanaloguesignalsisconcerned,apowerplaneisacoppersheetjustlikea0Vplane,soallofthegeneralissuesaboutplanes,especiallywhensignalsareroutednearto,orcross,theiredgesappliesinjustthesameway–andtheguidancein[7](especiallyitssection4)appliesequallytopowerplanes.SomeEMCexpertsprefernottousepowerplanes,becauseifnotusedcarefullythecavityresonancesthatnaturallyarisewhentheyareusedincombinationwithanotherplanecancauseanincreaseinemissions.Thissectionwillshowhowpowerplanes