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JEDECStandardNo.21CPage4.20.21-1Revision0.05Release194.20.21-204-PinEP3-6400/EP3-8500/EP3-10600/EP3-12800DDR3SDRAM72b-S0-DIMMDesignSpecificationDDR3SDRAM72b-SO-DIMMDesignSpecificationRevision0.05January2010JEDEDStandardNo.21CPage4.20.21-2Release19Revision0.05Contents1.ProductDescription...........................................................................................................................32.EnvironmentalRequirements............................................................................................................43.PinoutandDescription......................................................................................................................54.ComponentDetails.............................................................................................................................105.DDR3RegisteredDIMMWiringDetails............................................................................................205.1SignalGroups.....................................................................................................................................205.2GeneralNetStructureRoutingGuidelines..........................................................................................205.3Signalreferencinginformation............................................................................................................205.4DifferentialClockNetStructures.........................................................................................................215.5TestPoints..........................................................................................................................................215.6TestPointLocation.............................................................................................................................215.7ExplanationofNetStructureDiagrams...............................................................................................225.8NetStructureExample........................................................................................................................226.TimingBudget......................................................................................................................................237.OnDIMMThermalSensor...................................................................................................................248.SerialPresenceDetectDefinition.....................................................................................................259.DDR3DIMMLabelFormat..................................................................................................................2710.DIMMMechanicalSpecifications....................................................................................................29AnnexA-RawCardA............................................................................................................................TBDAnnexB-RawCardB............................................................................................................................TBDAnnexC-RawCardC............................................................................................................................TBDAnnexD-RawCardD............................................................................................................................TBDJEDECStandardNo.21CPage4.20.21-3Revision0.05Release191ProductDescriptionThisspecificationdefinestheelectricalandmechanicalrequirementsfor204-pin,1.5Volt,EP3-6400/EP3-8500/EP3-10600/EP3-12800,72bit-wide,DoubleDataRateSynchronousDRAMSmallOutlineDualIn-LineMemoryModules(DDR3SDRAM72b-SO-DIMMs).These72b-SO-DIMMsareintendedforuseasmainmemorywheninstalledinembeddedsystemssuchastelecommunicationsI/Ocards.EP3-6400/EP3-8500/EP3-10600/EP3-12800referstotheJEDECstandardDIMMnamingconventioninwhichEP3-6400/EP3-8500/EP3-10600/EP3-12800indicatesa204-pinDIMMrunningat400/533/666/800MHzclockspeedandoffering6400/8500/10600/12800MB/sbandwidthonthepri-marydatabus.Referencedesignexamplesareincludedwhichprovideaninitialbasisfor72b-SO-DIMMdesignswhichmaybeunbuf-fered(72b-SO-DIMM),registered(72b-SO-RDIMM),orclocked(72b-SO-CDIMM).Modificationstothesereferencedesignsmayberequiredtomeetallsystemtiming,signalintegrity,andthermalrequirementsforPC3-6400/PC3-8500/PC3-10600/PC3-12800support.AllregisteredDIMMimplementationsmustusesimulationsandlabverificationtoensurepropertimingrequirementsandsignalintegrityinthedesign.Table1—ProductFamilyAttributesDIMMorganizationx72ECCDIMMdimensions:height(nom.)xwidth(nom.)xthickness(max.)/MO-number,Variation30.0mmx67.6mmx3.80mm/MO-268,VariationxA30.0mmx67.6mmx6.75mm/MO-268,VariationTBD30.0mmx67.6mmx7.55mm/MO-268,VariationTBDPincount204SDRAMssupported512Mb,1Gb,2Gb,4Gb,8GbRankssupportedperDIMM1,2,4Capacity256MB,512MB,1GB,2GB,4GB,8GB,16GB,32GBSerialPDConsistentwithJC45Voltageoptions1.5volt(VDD),3.3volt(VDDSPD)Interface1.5voltsignalswitchingbasedonreferencevoltageatVDD/2.SeeDRAMspecificationformoredetail.JEDEDStanda
本文标题:SO-DIMM-DDR3-design
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