基于VHDL的矩阵键盘及显示电路设计

基于VHDL的矩阵键盘及显示电路设计张喜凤,屈宝鹏(,710300):为了有效防止机械式键盘按键抖动带来的数据错误,这里在Quartus开发环境下,采用VHDL语言设计了一种能够将机械式44矩阵键盘的按键值依次显示到8个7段数码管上的矩阵键盘及显示电路仿真结果表明,所设计的矩阵键盘及显示电路成功地实现了按键防抖和按键数据的准确显示以ACEX1K系列EP1K30QC208芯片为硬件环境,验证了各项设计功能的正确性:VHDL;键盘;按键防抖;数码管:TN71034;TP332.1+2:A:1004373X(2010)16001403DesignoftheMatrixKeyboardandDisplayCircuitBasedonVHDLZHANGXifeng,QUBaopeng(ElectronicsEngineerDepartmentofShaanxiInstituteofTechnology,Xi!an710300,China)Abstract:TheapplicationoftheFPGA/CPLDbecomesmoreandmoreextensiveinthedesignofdigitalsystem,andithasaffectedourlifedeeply.Thedatainputtedbymatrixkeyboardanddisplayedbydigitaltube,thedesignisappliedwidelyinelectronequipments.Inordertoavoidthedatamistakesresultedbythekeypressshake,amatrixkeyboardanddisplaycircuitwhichcandisplaythekeypressinputdataproducedby44matrixkeyboardinturnwith8word7segdisplaywasdesignedwiththelanguageofVHDLintheenvironmentofQuartus.Thesimulationresultsindicatethatthematrixkeyboardanddisplaycircuitdesignedinthispaperrealizedthekeypressantishakeandexactdisplay.Finally,validityofwholedesignedfunctionswasvalidatedwiththeEP1K30QC208chipofACEX1Kseries.Keywords:VHDL;keyboard;antishake;digitaltube:20100312FPGA/CPLD,[14]FPGA/CPLD,VHDL,,,[3,56]FPGA/CPLD,AlteraQuartus,,,VHDLFPGA/CPLD[7],,7,Quartus,VHDL814487,0,0~61~7,1,4:(1),,(2)5~10ms,,,(3)88,(4)8,,7214:VHDL2,clk(1024~32768Hz);start;kbrow;kbcol;scan;seg7图1矩阵键盘及显示电路原理图图2矩阵键盘及显示电路的电路符号,VHDL,1,7(process),P1P2kbrow,enkbcol,kbcolstate(kbrow=∀0000#),en=∃1!,kbcol;,en=∃0!,,kbcolP1P2:P1:process(clk,kbrow)beginen=not(kbrow(0)orkbrow(1)orkbrow(2)orkbrow(3));if(clk%eventandclk=%1%)thenifen=%1%thencount=count+1;endif;endif;endprocess;P2:process(clk)beginifclk%eventandclk=%1%thencasecountiswhen00=kbcol=0001;state=00;when01=kbcol=0010;state=01;when10=kbcol=0100;state=10;when11=kbcol=1000;state=11;whenothers=kbcol=1111;endcase;endif;endprocess;P3∀case&when#,state(kbcol)kbrow,4dat,,kbcol=∀0010#,kbrow=∀0001#,∀B#,dat=∀1011#P3P4P5en8reg8,reg88key,,key,fnq,en=∃0!,,key1∃0!,fnq=∃0!,8,key∃1!,fnq=∃1!,fnq,dattemp(32)0~3,temp0~274~31,1P4P5:P4:process(clk)variablereg8:std_logic_vector(7downto0);BEGINif(clk%eventandclk=%1%)thenreg8:=reg8(6downto0)&en;endif;key=reg8;endprocess;fnq=key(0)andkey(1)andkey(2)andkey(3)andkey(4)andkey(5)andkey(6)andkey(7);P5:process(fnq,start)BEGINIFstart=%0%thentemp=00000000000000000000000000000000;elsif(fnq%eventandfnq=%1%)thentemp=temp(27downto0)&dat;endif;endprocess;P6temp328,scan,data(42)P6:P6:process(clk,temp,cnt8)beginifclk%eventandclk=%1%thencnt8=cnt8+1;endif;casecnt8is15∋(201016327when0=scan=000;data=temp(3downto0);when1=scan=001;data=temp(7downto4);when2=scan=010;data=temp(11downto8);when3=scan=011;data=temp(15downto12);when4=scan=100;data=temp(19downto16);when5=scan=101;data=temp(23downto20);when6=scan=110;data=temp(27downto24);when7=scan=111;data=temp(31downto28);whenothers=null;endcase;endprocess;P7data7seg7,P7,,,:(1),,81,,,5~10ms[89],,,1,32768Hz,,(2)32temp,,8,83Quartus,3:(1)clk,;(2)start,,;(3)kbrow,kbcol,3kbrow[1],∀A#;(4)fnq,scan,seg73,,,图3矩阵键盘及显示电路按键防抖仿真波形,4Quartus,ZY11EDA13BEACEX1KEP1K30QC208,1024~32768Hz,,1024Hz,,;32768Hz,,参考文献[1].()[M].:,2004.[2],,.CPLD/FPGA[M].:,2006.[3],.VHDL[M].:,2000.[4],,.EDA[M].:,2005.[5],.VHDL[M].:,2001.[6],,.VHDL[J].,2002(10):58.[7],,.QuartusFPGA/CPLD[M].:,2007.[8],.VHDL[J].,2009(3):5862.[9],.VHDL[J].,2005(2):2526.:张喜凤女,内蒙古萨拉齐人,助教,硕士主要从事半导体材料及集成电路方面的科研与教学工作屈宝鹏男,陕西佳县人,讲师主要从事半导体材料及集成电路方面的科研与教学工作16:VHDL