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FPGA/CPLDFPGA/PLDPLDProgramableLogicDeviceFPGAFieldProgramableGateArray)PLD/FPGAPLD70FPGA/PLDFPGA/PLDPLDPLDCPU,74PLDPLDPCBPLDPLDPCBPLDPLD90EDAHDL)1FPGA/CPLDPLDPLDPLDPLDPLD1.PLD2.PLD1.PLDPLDPLDHDLPLDPLDPLDPLD?PLD()+MAXXilinxWebPack,xilinxLatticeActelLicenseLicenseEDAlicense2FPGA/CPLDVHDLVerilogHDLPLD/FPGA,HDL,FPGAHDL,PLDProduct-TermEEPROMFlashPLDLook-UptableSRAMPLD/FPGAEEPROMPLD5,000SRAMPLD(FPGA)10,000CPLD/FPGAALTERAXILINXLattice2.PLDPLD/FPGA.pofPLD1.Product-TermEEPROM(Flash)PLDAlteraMAXLatticeXilinxXC9500)AlteraByteblaster3FPGA/CPLDPCBPLDALTERAByteblasterMVISPByteblasterPLDPLDISPPLDISPPLD4FPGA/CPLD1.PLDPCB2.3.PLD2.Look-UptableSRAMFPGAAlteraFLEX,ACEXAPEXXilinxSpartan,Virtex)SRAMPLDEEPROMEEPROMPLDPLD(CPUPLD)SRAMPLD3.Anti-fuseFPGAActelQuicklogicEEPOMPLDPLD5FPGA/CPLDFPGA/CPLD(VLSIC)(ASIC)ASICASIC(FPLD)(FPGA)(CPLD)(PROM)(EPROM)(EEPROM)(PLD)PLDPLD6FPGA/CPLDPAL()GAL()PALPALEPROMEEPROM(PLA)PLAPALGAL(GenericArrayLogic)GAL16V8,GAL22V10EEPROMPLDPLD7FPGA/CPLD2080AlteraXilinxPALCPLD(ComplexProgrammab1eLogicDvice)FPGA(FieldProgrammableGateArray)PLDASIC(ApplicationSpecificIC)(10,000)PLDFPGACPLDXilinxSRAMEEPROMPLDFPGAFlashEEPROMPLDCPLD;AlteraPLD:MAXEEPROM,FLEXSRAMCPLD,PLD(ComplexPLD),FLEXSRAM,EPROM,XilinxFPGAAlteraFELXFPGA.8FPGA/CPLD8FPGACPLDFPGA()CPLD()PAL,GALPAL,GALFPGACPLDICFPGACPLDXilinxFPGAAlteraCPLDPLDXilinxALTERAPLD/FPGA60%AlteraXilinxAlteraXilinxPLDLatticeVantisActelQuicklogicLucent99LatticeVantisPLDXilinxPhilipsPLD1998PLD9FPGA/CPLD()1Altera5.9630.12Xilinx5.7429.03Vantis2.2011.14Lattice2.1811.05Actel1.397.06Luccent0.854.37Cypress0.442.28Atmel0.422.19Philips0.281.410Quicklogic0.241.2FPGA,CPLDPLDPLD10FPGA/CPLDPLDCPLDFPGA11FPGA/CPLDFPGACPLDASICASICVlSI(VeryLargeScaleIC)FPGACPLDFPGACPLDFPGACPLDFPGAPLDFPGACPLDFPGACPLDFPGACPLDIC()FPGACPLD12FPGA/CPLDFPGA/PLDA:.Product-TermPLDPLDAlteraMAX7000MAX3000EEPROM,XilinxXC9500FlashLattice,CypressEEPROMPLDMAX70001PLDPLDMarocell)PIA)I/OPLD1I/O13FPGA/CPLD1INPUT/GCLK1INPUT/GCLRn,INPUT/OE1,INPUT/OE2PLD2D14FPGA/CPLDPIAI/OPLD,PLD3(AND3)ff=(A+B)*C*(!D)=A*C*!D+B*C*!D(!DDPLDf:415FPGA/CPLDA,B,C,DPLDPIA)A,A,B,B,C,C,D,D8f=f1+f2=(A*C*!D)+(B*C*!D)3DDCLKI/OI/OPLD33PLDPLDEEPROMFlashB:Look-Up-Table)16FPGA/CPLDPLDFPGAalteraACEX,APEX,xilinxSpartan,VirtexLook-Up-Table)LUTLUTRAMFPGA4LUTLUT416x1RAMHDLPLD/FPGARAM,4LUTa,b,c,dRAM00000000000001000010....0...0111111111117FPGA/CPLDLUT)FPGAxilinxSpartan-IIxilinxSpartan-IISlicesSpartan-IICLBsI/ORAMspartan-IICLB2Slices,slicesLUTSlicesSpartanII(xilinxSpartanXL,Virtex18FPGA/CPLDalteraFLEX/ACEXalteraFLEX/ACEX19FPGA/CPLDLEFLEX/ACEXLABI/ORAM/FLEX/ACEXLAB8LE,LELUTLEFLEX/ACEX(alteraAPEXFPGAA,B,C,DFPGALUTLUTDLUTDCLKI/OI/O20FPGA/CPLDPLD3LUTLUTFPGALUTSRAMFPGASRAMSRAMFPGAFPGAFPGAFlashFPGAPLDFPGAPLDPLD2030FPGALUT4PLDFPGAFPGALUTPLD21FPGA/CPLD512FPGAPLDFPGA22
本文标题:CPLD及FPGA介绍
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