SMT-09ProcessFlowCD

©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaSemiconductorManufacturingTechnologyMichaelQuirk&JulianSerda©October2001byPrenticeHallChapter9ICFabricationProcessOverview©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaObjectivesAfterstudyingthematerialinthischapter,youwillbeableto:1.Drawadiagramshowinghowatypicalwaferflowsinasub-micronCMOSICfab.2.Giveanoverviewofthesixmajorprocessareasandthesort/testareainthewaferfab.3.Foreachofthe14CMOSmanufacturingsteps,describeitsprimarypurpose.4.DiscussthekeyprocessandequipmentusedineachCMOSmanufacturingstep.©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaMajorFabricationStepsinMOSProcessFlowUsedwithpermissionfromAdvancedMicroDevicesFigure9.1UsedwithpermissionfromAdvancedMicroDevicesOxidation(Fieldoxide)SiliconsubstrateSilicondioxideoxygenPhotoresistDevelopoxidePhotoresistCoatingphotoresistMask-WaferAlignmentandExposureMaskUVlightExposedPhotoresistexposedphotoresistGSDActiveRegionstopnitrideSDGsiliconnitrideNitrideDepositionContactholesSDGContactEtchIonImplantationoxDGScanningionbeamSMetalDepositionandEtchdrainSDGMetalcontactsPolysiliconDepositionpolysiliconSilanegasDopantgasOxidation(Gateoxide)gateoxideoxygenPhotoresistStripoxideIonizedoxygengasOxideEtchphotoresistoxideIonizedCF4gasPolysiliconMaskandEtchoxideIonizedCCl4gas©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaCMOSProcessFlow•OverviewofAreasinaWaferFab–Diffusion–Photolithography–Etch–IonImplant–ThinFilms–Polish•CMOSManufacturingSteps•ParametricTesting©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaModelofTypicalWaferFlowinaSub-MicronCMOSICFabTest/SortImplantDiffusionEtchPolishPhotoCompletedWaferUnpatternedWaferWaferStartThinFilmsWaferFabrication(front-end)UsedwithpermissionfromAdvancedMicroDevicesFigure9.2©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaSimplifiedSchematicofHigh-TemperatureFurnaceGasflowcontrollerTemperaturecontrollerPressurecontrollerHeater1Heater2Heater3ExhaustProcessgasQuartztubeThree-zoneHeatingElementsTemperature-settingvoltagesThermocouplemeasurementsFigure9.3©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaPhotolithographyBayinaSub-micronWaferFabPhotocourtesyofAdvancedMicroDevicesPhoto9.1©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaLoadStationVaporPrimeSoftBakeCoolPlateCoolPlateHardBakeTransferStationResistCoatDevelop-RinseEdge-BeadRemovalWaferTransferSystemWaferCassettesWaferStepper(Alignment/ExposureSystem)SimplifiedSchematicofaPhotolithographyProcessingModuleFigure9.4©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaSimplifiedSchematicofDryPlasmaEtcherFigure9.5e-e-R+Glowdischarge(plasma)GasdistributionbaffleHigh-frequencyenergyFlowofbyproductsandprocessgasesAnodeelectrodeElectromagneticfieldFreeelectronIonsheathChamberwallPositiveionEtchantgasenteringgasinletRFcoaxcablePhotonWaferCathodeelectrodeRadicalchemicalVacuumlineExhausttovacuumpumpVacuumgaugee-©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaSimplifiedSchematicofIonImplanterIonsourceAnalyzingmagnetAccelerationcolumnBeamlinetubeIonbeamPlasmaGraphiteProcesschamberScanningdiskMassresolvingslitHeavyionsGascabinetFilamentExtractionassemblyLighterionsFigure9.6©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaThinFilmMetallizationBayPhotocourtesyofAdvancedMicroDevicesPhoto9.2©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaSimplifiedSchematicsofCVDProcessingSystemCapacitive-coupledRFinputSusceptorHeatlampsWaferGasinletExhaustChemicalvapordepositionProcesschamberCVDclustertoolFigure9.7©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaPolishBayinaSub-micronWaferFabPhotocourtesyofAdvancedMicroDevicesPhoto9.3©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerda1.Twin-wellImplants2.ShallowTrenchIsolation3.GateStructure4.LightlyDopedDrainImplants5.SidewallSpacer6.Source/DrainImplants7.ContactFormation8.LocalInterconnect9.InterlayerDielectrictoVia-110.FirstMetalLayer11.SecondILDtoVia-212.SecondMetalLayertoVia-313.Metal-3toPadEtch14.ParametricTestingPassivationlayerBondingpadmetalp+SiliconsubstrateLIoxideSTIn-wellp-wellILD-1ILD-2ILD-3ILD-4ILD-5M-1M-2M-3M-4Polygatep-Epitaxiallayerp+ILD-6LImetalViap+p+n+n+n+2314567891011121314CMOSManufacturingSteps©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdan-wellFormationFigure9.8©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdap-wellFormationFigure9.9©2001byPrenticeHallSemiconductorManufacturingTechnologybyMichaelQuirkandJulianSerdaSTITrenchEtchThinFilms12PhotoPolishEtchImplantDiffusion34+IonsSelectiveetchingopensisolationregionsintheepilayer.p+Siliconsubstratep-Epi