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ExploreMicroelectronicsreservestherighttomakechangeswithoutfurthernoticetoanyproductshereintoimprovereliability,functionordesign.ExploreMicroelectronicsdoesnotassumeanyliabilityarisingoutoftheapplicationoruseofanyproductorcircuitdescribedherein;neitherdoesitconveyanylicenseunderitspatentrightsnortherightsofothers.ExploreMicroelectronicsproductsarenotdesigned,intended,orauthorizedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody,orotherapplicationsintendedtosupportorsustainlife,orforanyotherapplicationinwhichthefailureoftheExploreMicroelectronicsproductcouldcreateasituationwherepersonalinjuryordeathmayoccur.ShouldBuyerpurchaseoruseExploreMicroelectronicsproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdExploreMicroelectronicsanditsofficers,employees,subsidiaries,affiliates,anddistributorsharmlessagainstallclaims,costs,damages,andexpenses,andreasonableattorneyfeesarisingoutof,directlyorindirectly,anyclaimofpersonalinjuryordeathassociatedwithsuchunintendedorunauthorizeduse,evenifsuchclaimallegesthatExploreMicroelectronicswasnegligentregardingthedesignormanufactureofthepart.UserGuide—EP387A_UGV0.7ExploreMicroelectronics1DualPixelLVDSTransmitterEP387AUserGuideV0.7OriginalReleaseDate:January30,2003ExploreMicroelectronics,TaiwanRevised:Nov.29,2005UserGuide—EP387A_UGV0.7ExploreMicroelectronics2RevisionHistoryVersionNumberRevisionDateAuthorDescriptionofChanges0.0Jan/30/2003--InitialVersion0.1Feb/18/2003--Correctpinnames0.2Jun/17/2003--PowerConsumptionMeasurement0.3Aug/14/2003--Correctambiguoussentence0.4Dec/14/2004EtherLaiUpdateElectricalCharacteristics&AddPackageInformation0.5Jun/02/2005EtherLaiAdditionalFunctionin2ndLink;IDPositionChange0.6Jul/15/2005EtherLaiAddESDRating0.7Nov/29/2005EtherLaiChangePackageMarkingUserGuide—EP387A_UGV0.7ExploreMicroelectronics3Section1Introduction1.1OverviewTheEP387AsupportsdualLVDSlinkstransmissionbetweenthehostandtheflatpaneldisplayuptoQXGAresolutions.Thetransmitterconverts48bits(24-bitcolor,dualpixel)ofCMOS/TTLdataand3controlbitsinto8LVDS(LowVoltageDifferentialSignal)datastreams.Atamaximuminputclockrateof112MHzinthedualpixelmode,eachLVDSdifferentialdatapairspeedis784Mbps,providingatotalthroughputof5.4Gbps.Twoadditionalmodesaresupported.Oneofthemconverts24bits(24-bitcolor,singlepixel)datainputintodualLVDSlinksandtheinputclockratecanbeupto165MHz.Theothermodeconverts24bitsdatainputintosingleLVDSlinkinordertosupporttheinter-operabilitywiththeconventionalLVDSapplication.Theconfigurablepre-emphasisfeatureisprovidedtosupportadditionaloutputstrengthtoreducethecableloadingeffects.TheEP387AprovidesasecondLVDSoutputclockpair.BothLVDSclockspairsareidentical.ThisfeaturesupportsbackwardcompatibilitywiththepreviousgenerationofsinglepixelLVDStransmitter.Thesecondclockallowsthetransmittertointerfacetopanelusingadualpixelconfigurationoftwo24-bitor18-bitLVDSreceivers.1.2FeaturesTheEP387Aincludesthefollowingdistinctivefeatures:•SupportsSVGAthroughQXGAresolutions•Support32.5MHzto112/170MHzclockrates•Upto5.4Gbpsbandwidth•Pre-emphasisreducescableloadingeffects•ProgrammableInterfacetotimingcontroller,dual-in/dual-out,single-in/dual-outandsingle-in/single-out.•Cycle-to-cyclejitterrejection•5Vtolerantondataandcontrolinputpins•Programmabledataandcontrolstrobeselect•CompatiblewithANSI/TIA/EIA-644LVDSstandard•CompatiblewithNationalDS90C387A•Single3.3VCMOSdesign•100-pinLQFP(PbFree,complianttoJEDEC/IPCJ-STD-006)UserGuide—EP387A_UGV0.7ExploreMicroelectronics4UserGuide—EP387A_UGV0.7ExploreMicroelectronics5Section2Overview2.1BlockDiagramFigure2-1BlockDiagramofLVDSTransmitterEP387ADCLKR17-R10G17-G10B17-B10TTLINPUTLATCHPLLA0HSYNC,VSYNC,DER_FB,R_FDE,DUALR27-R20G27-G20B27-B20PWR_UPDATASERIALIZER48A1A2A3A4A5A6A7CLK1CLK2VCCPREPLLSELUserGuide—EP387A_UGV0.7ExploreMicroelectronics62.2PinDiagramFigure2-2PGND16NC15PRE14GND13PVDD12DCLK11R1010R119R128R137R146R155R164R173G102G111CLK2P26CLK2M27A7P28A7M29LVDD30A6P31A6M32A5P33A5M34LGND35A4P36A4M37A3P38A3M39LVDD40CLK1P41LGND25GND24DUAL23PWR_UP22R_FDE21R_FB20PGND19PVDD18PGND17CLK1M42LGND43A2P44A2M45A1P46A1M47LVDD48A0P49A0M50B2460B2361B2262B2163B2064G2765G2666VDD67GND68G2569G2470G2371G2272G2173G2074R2775LGND51GND52VDD53HSYNC54VSYNC55DE56B2757B2658B2559G12100G1399GND98VDD97G1496G1595G1694G1793B1092B1191B1290B1389B1488B1587B1686B1785R2084GND83VDD82R2181R2280R2379R2478R2577R2676PinDiagramofEP387ALVDSTransmitterUserGuide—EP387A_UGV0.7ExploreMicroelectronics72.3PinDescriptionUnlessotherwisestated,unusedinputpinsmustbetiedtoground,andunusedoutputpinsleftopen.Table2-1InputControl/Data/CLKPinsNAMEPIN#IN/OUTDESCRIPTIONR17~R10G17~G10B17~B103~1093~96,99~100,1,285~92INPixelDataInputsfordualpixelinputmodeorsinglepixelinputmode.R27~R20G27~G20B27~B2075~81,8465~66,69~7457~64INPixelDataInputsfordualpixelinputmode.DE56INDataEnableInput.HSYNC54INHorizontalSyncInput.VSYNC55INVerticalSyncInput.DCLK11INDataClockInput.R_FB20INProgrammabledatastrobeselect.Risingdatastrobeedgeselectedwheninputishigh.R_FDE21INProgrammableDEstrobeselect.TiedHIGHfordataactivewhenDEis
本文标题:EP387A-UG-V0.7---Dual-Pixel-LVDS-Transmitter
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