Measurement, Control, and Communication Using IEEE

Measurement,Control,andCommunicationUsingIEEE1588总结全书结构如下：PartIBackground1IntroductiontoTime-basedMeasurement,Control,andCommunication2TheEvolutionofClocksandClockSynchronization3AnOverviewofClockSynchronizationUsingIEEE1588PartIIIEEE15884ADetailedAnalysisofIEEE15885PracticalIssuesinImplementingIEEE1588PartIIIApplyingIEEE15886SystemArchitectureBasedonSynchronizedClocks7CaseStudiesinIndustrialAutomationandPower8CaseStudiesinInstrumentationSystems9CaseStudiesinCommunications10TheFutureofIEEE1588andTime-basedApplicationsPartIVAppendicesAfielddefinitionsforIEEE1588MessagesBIEEE1588DataSets一、生活中需要以时间来安排计划，时钟在嵌入式系统中有同样的意义，尤其是对实时任务处理二、TheEvolutionofClocksandClockSynchronization•Brieflookattheinfluenceoftimeanditsmeasurementonourlives,•Discussionofthemeasurementoftimeandtimeintervals,•Discussionoftimescalesandcalendars•Surveyofseveralclocksynchronizationprotocols.各种同步协议都不能完全很好的解决网络同步的问题，所以有了IEEE1588的出现和发展，但是其也存在相关问题和一定的应用局限性，有待解决与研究。三、AnOverviewofClockSynchronizationUsingIEEE15883.1TheObjectivesofIEEE15881.Synchronizedtosub-microsecondaccuracy微秒级以下同步精度2.Theprotocolmustoperateoverlocalareanetworksthatsupportmulticastcommunications.3.Theprotocolisdesignedtooperateonrelativelylocalizednetworksystemstypicallyfoundintestandmeasurementorindustrialautomationenvironmentsatthebenchorworkcelllevel.4.Theprotocolmustaccommodateclockswithavarietyofaccuracy,resolution,andstabilityspecifications.5.Theprotocolisdesignedtobeadministration-free,atleastinthedefaultmodeofoperation.6.Theprotocolisdesignedwithminimalresourcerequirementsbothintermsofnetworkbandwidth,andcomputationalandmemorycapabilityinthedevices.3.3FundamentalOperationoftheProtocol•Establishingboundariesandcommunicationsforthesystemtobesynchronized,•Establishingamaster-slavesynchronizationhierarchy,•Establishingorderlystartupandreconfigurationofthesystem,•Providingthenecessaryinformationtoallowslaveclockstocorrectlysynchronizetotheirmaster,and•Providingsystemandclockmanagementcapabilitywhenneededbyanapplication.为了实现同步，则协议需要包含：•Provideoneormoreeventsthatcanbetimestampedandusedasthebasisforcomputingclockcorrections,•Communicatetheneededtimestampstotheclocksrequiringthisinformation,and•Overcometimingimpairmentsintroducedbythevariouscomponentsofthesystem.由其同步过程我们知道thetimestampsassociatedwithsendingandreceivingSyncandDelayReqmessagesarecriticaltotheoperationoftheprotocol.四．ADetailedAnalysisofIEEE15881.不同状态昀大的区别在于其接受与处理的消息不一致方框代表状态，箭头代表状态转换，箭头上文字标示转换所需要的事件触发，其类似于一个有限状态机，需分析其不同的状态可能切换的所有情况，而当一个节点固定为从节点时其可能的状态会减少2.状态切换过程介绍State-change-event事件必须每个同步间隔里产生一次，即是昀佳主时钟可能一直变化，而在运行BMC和状态转换计算中，输入到节点中的时钟相关信息消息不能改变，EbestisthebestofthesetconsistingofErbestforalloftheclock’sports，Erbest主要由同步信息判断，而Sync也需要进行资格判断。AllportsofIEEE1588clockscanbeuniquelyidentifiedbythreeattributes：•Thecommunicationtechnologyfield.Thisfielddescribesthenetworktechnologyimplementedbytheport.•Theuuidfield.Thisfieldisuniquetotheclockcontainingtheportunderconsideration.•Theportidfield.Thisfieldisanindexontheport,asdiscussedearlier.而当一个端口产生一个同步信息，就包含这三种信息3.TheStateDecisionAlgorithmandDataSetUpdates分析：四个端口1.2.3.4，每个端口挑选ErbestSync消息，然后通过各个模块ABCD决定各个端口的状态，其中C模块包含的是自身的数据集。该节详细讲解了状态决定算法和数据比较集算法的各种情况，需详细分析，关键在于理解Erbest和Ebest以及stratum（层），需要深入研究。Stratum：Avalueof1indicatesthattheclockisaprimaryreferencestandarddirectlytraceabletoarecognizedsourceofUTC，其是根据时钟的精度来划分层的五、PracticalIssuesinImplementingIEEE15881ClockandBoundaryClockDesignTheIEEE1588specificblocksincludethe:•IEEE1588code(BandC),•IEEE1588-basedapplicationsupporthardware(F),•IEEE1588hardwareclock(G),•Clockadjustmentcircuitry(H),•Timestampcaptureregister(J),•Packetidentificationcaptureregister(K),and•Packetrecognizer(L).其Rate由AbruptUpdateRegister重写有突变，相当于频率突变，但是时间任然是连续的。SummaryofClockAdjustmentTechniques：•Softwaremodel:利用外部控制器的软件模块修改系统硬件时钟.Thisclearlywillrequirelesshardware,butdoesrequireallcapturedapplicationtimestampstobecorrectedinsoftwareusingtheerrormodel.Dependingontheapplication,thiscouldbeasignificantburdenonapplicationsoftware，为保证精度，italsomakesthetimingrequirementsforgeneratingtriggerinformationinapplicationsoftwaremoretime-critical，Caremustbetakentousethevaluesfortheinverseerrormodelapplicableatthetimeofthetrigger,sincethemodelislikelytochangeateachsynchronizationinterval.•Pulseadditionanddeletion:thishardwaretechniqueisveryeasytoimplement,butdoesrequiremoredigitalcircuitrythananyoftheothertechniques.Thistechniquealsointroducesasmallamountofphasenoiseinthetimescale，Thistechniquedoesnotplaceanyadditionaldemandsonapplicationsoftware.•Variablefrequencyoscillators:thistechniquedoesnothavethemissingcode,orthedigitalphasenoiseproblemsofthepulseadditionordeletionmethod.However,designingcircuitstomakesmalladjustmentstotheoscillatorfrequencywhilemaintaininglowphasenoiseismoredifficultthanthesimpledigitalsolution.Thistechniquedoesnotplaceanyadditionaldemandsonapplicationsoftware.Inmostcases,theIEEE1588codeshouldrunatthehighestpriority,similartoothersystemservices2.完整数据格式3.ClockServoDesign假定系统是线性，系统采用PI控制考虑非线性影响后4IEEE1588inNon-UDP/IPEthernetSystemsDeviceNet：DeviceNetisanindu