基于FPGA的FIR数字滤波器的设计与实现

FPGAFIR(300384):FPGAFIR,MatlabFIR,VHDL,FPGA,C51VHDL,LCD,:FPGA;;VHDL;;;:TN713:B:10042373X(2008)192184203DesignandRealizationofFIRDigitalFilterBasedonFPGAYANGGuoqing(TianjinInstituteofUrbanConstruction,Tianjin,300384,China)Abstract:ThispaperintroducesadesignandrealizationofFIRdigitalfilterbasedonFPGA.ThedesignuseswindowfunctionofMatlabtoolboxtocalculateFIRfiltercoefficient.ThroughVHDLlevelofdesign,FPGAandMCUorganicintegra2tion,C51andVHDLusedmodulardesignandoptimizeprogramming,theeffectiverealizationofthekeyboardcanalsosettheparametersandLCDdisplay,theresultsshowthatthisstructurecanbefurtherimprovedtoachievetherapiddataprocessingandeffectivecontrol,thedesignflexibility,reliabilityandextendibilityfunctionareimprovedaswell.Keywords:FPGA;filter;VHDL;windowfunction;modulization;extendibility:20082042221,,,,,(FiniteImpulseResponse,FIR),,,,[1]FIR,,,,,,DSPDSP,FIR,,,DSP,,,FPGA(FieldProgrammableGateArray,),,FIR,DSP,FPGA,FIR,2FIRNFIRx(n):y(n)=n=1i=0h(i)x(n-i)(1)h(n)x(n),,,481:FPGAFIR1,Ny(n)nn-1[2]1FIRFIR,,:h(n)=h(N-1-n),,h(n)N:y(n)=n=1i=0h(i)x(n-i)=N/2-1i=0h(i)[x(n-i)+(n-N+m)](2)2,N/2FIR,,2FIR,FIR,:;FPGA3FIRFIRA/DD/AFPGA,MatlabFIR,FPGAA/DD/AFPGA333.1A/DA/DTLC5540,8AD,FPGA20MHz,PLL40MHzA/D,FcA/D,,,D/ARAM,,,,QuartusLPMRAM,44RAM3.2FPGAFcFIR,Fc,,,1k,Fc100kHzRC,,553.3MatlabMatlabFilterDesign2ToolboxFDATool,,FIR,,[3],Fc=1kHz,Fs=2001kHz,Blackman,16,-3dB,581200819282þü,16FIR:h(1)=0h(2)=0.00016641498689276516h(3)=0.00076689485219645214h(4)=0.0020010204760067853h(5)=0.0039321895093036461h(6)=0.0062935250694657911h(7)=0.008489155830318321h(8)=0.0098211704787091736h(10)=0.0098211704787091736h(11)=0.008489155830318321h(12)=0.0062935250694657911h(13)=0.0039321895093036461h(14)=0.0020010204760067853h(15)=0.00076689485219645214h(16)=0.00016641498689276516h(17)=03.4:511(10b,31b,31b),,66FIR4FPGAALTERACycloneFPGAEP2C8Q20C8,QuartusVHDL,,,AT89S8253,,LCD,,FPGA,DDSFPGA,MatlabFIR,VHDL,FPGA,C51VHDL,,,[1].[M].:,2003.[2]UweMeyer2baese.FPGA[M].,,.:,2006.[3].Matlab7[M].:,2005.[4].[M].:,2006.[5]ChengC,ParhikK.Low2costParallelFIRFilterStructureswith22stageParallelism[J].IEEETransactionsonCircuitsandSystems,2007(54):2802290.[6]ChenXiaoping,QuBo,LuGang.AnApplicationofImmuneAlgorithminFIRFilterDesign[J].Proceedingsofthe2003InternationalConferenceonNeuralNetworksandSignalProcessing,Nanjing,China,2003(1):4732475.[7],,,.FIR[J].,2006,36(5):6742678.[8],.FPGA[M].:,2005.[9],.EDAVHDL[M].:,2005.[10],,.32[J].,2005,26(2):3072309.,1974,,G10918,PowerShotG10S1ISSX10ISIXUS980ISIXUS870ISPowerShotG9G10,1470CCD,28140mm,DIGICIV,()681:FPGAFIR