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1DLX指令系统:addaddfaddiadduadduiandandibfpfbfptbnezcvtd2fcvtd2icvtf2dcvtf2icvti2dcvti2fdivdivddivfdivueqdeqfgedgefgtdgtfjjaljalrjrlblbuldledleflflhlhilhultdltflwmovdmovfmovfp2imovi2fpmovi2smovs2imultmultdmultfmultunednefnopororirfesbsdseqseqisfsgesgeisgtsgtishslesleisllsllisltsltisnesneisrasraisrlsrlisubsubdsubfsubisubusubuiswtrapxorxoriaddEx:addr1,r2,r3R[regc]←R[rega]+R[regb]Allaresignedintegers.adddEx:adddf4,f4,f6D[dregc]←D[drega]+D[dregb]Allaredoubleprecisionfloatingpointnumbers.2addfEx:addff3,f4,f5F[fregc]←F[frega]+F[fregb]Allaresingleprecisionfloatingpointnumbers.addiEx:addir5,r2,#5R[regb]←R[rega]+imm16Allaresignedintegers.adduEx:addur2,r3,r4R[regc]←R[rega]+R[regb]Allareunsignedintegers.adduiEx:adduir2,r3,#28R[regb]←R[rega]+uimm16Allareunsignedintegers.andEx:andr2,r3,r4R[regc]←R[rega]&R[regb]Allareunsignedintegers.Logical'and'isperformedonabitwisebasis.andiEx:andir3,r4,#5R[regb]←R[rega]&uimm16Allareunsignedintegers.Logical'and'isperformedonabitwisebasis.beqzEx:beqzr1,labelif(R[rega]==0)PC←PC+imm16+4bfpfEx:bfpflabelif(fps==0)PC←PC+imm16+4fpsisthefloatingpointstatusbit.bfptEx:bfptlabelif(fps==1)PC←PC+imm16+4fpsisthefloatingpointstatusbit.bnez3Ex:bnezr1,labelif(R[rega]!=0)PC←PC+imm16+4cvtd2fEx:cvtd2ff1,f4F[fregc]←(float)D[drega]Convertsdoubleprecisionfloatingpointvaluetosingleprecisionfloatingpointvalue.cvtd2iEx:cvtd2if1,f0F[fregc]←(int)D[drega]Convertsdoubleprecisionfloatingpointvaluetointeger.cvtf2dEx:cvtf2df4,f9D[dregc]←(double)F[frega]Convertssingleprecisionfloattodouble.cvtf2iEx:cvtf2if3,f4F[fregc]←(int)F[frega]Convertssingleprecisionfloattointeger.cvti2dEx:cvti2df2,f9D[dregc]←(double)F[frega]Convertsasignedintegertodoubleprecisionfloat.cvti2fEx:cvti2ff2,f5F[fregc]←(float)F[frega]Convertsasignedintegertosingleprecisionfloat.divEx:divf2,f2,f3F[fregc]←F[frega]/F[fregb]Allaresignedintegers.divdEx:divdf4,f4,f6D[dregc]←D[drega]/D[dregb]Allaredoubleprecisionfloats.divf4Ex:divff2,f3,f6F[fregc]←F[frega]/F[fregb]Allaresingleprecisionfloats.divuEx:divuf2,f3,f4F[fregc]←F[frega]/F[fregb]Allareunsignedintegers.eqdEx:eqdf2,f4if(D[drega]==D[dregb])fps=1elsefps=0Botharedoubleprecisionfloats.eqfEx:eqff3,f5if(F[frega]==F[fregb])fps=1elsefps=0Botharesingleprecisionfloats.gedEx:gedf8,f6if(D[drega]=D[dregb])fps=1elsefps=0Botharedoubleprecisionfloats.gefEx:geff3,f6if(F[frega]=F[fregb])fps=1elsefps=0Botharesingleprecisionfloats.gtdEx:gtdf8,f6if(D[drega]D[dregb])fps=1elsefps=0Botharedoubleprecisionfloats.gtfEx:gtff3,f6if(F[frega]F[fregb])fps=1elsefps=0Botharesingleprecisionfloats.jEx:jlabelPC←PC+imm26+4UnconditionallyjumpsrelativetothePCofthenextinstruction.imm26isa26-bitsignedinteger.5jalEx:jallabelR31←PC+8;PC←PC+imm26+4Savesareturnaddressinregister31andjumpsrelativetothePCofthenextinstruction.imm26isa26-bitsignedinteger.jalrEx:jalrr2R31←PC+8;PC←R[rega]Savesareturnaddressinregister31anddoesanabsolutejumptothetargetaddresscontainedinR[rega].jrEx:jrr3PC←R[rega]R[rega]istreatedasanunsignedinteger.DoesanabsolutejumptothetargetaddresscontainedinR[rega].lbEx:lbr1,40-4(r2)R[regb]←(signextended)M[imm16+R[rega]]Onebyteofdataisreadfromtheeffectiveaddresscomputedbyaddingsignedintegerimm16andsignedintegerR[rega].Thebytefrommemoryisthensignextendedto32-bitsandstoredinregisterR[regb].lbuEx:lbur2,label-786+4(r3)R[regb]←0^24##M[imm16+R[rega]]Onebyteofdataisreadfromtheeffectiveaddresscomputedbyaddingsignedintegerimm16andsignedintegerR[rega].Thebytefrommemoryisthenzeroextendedto32bitsandstoredinregisterR[regb].ldEx:ldf2,240(r1)D[dregb]←64M[imm16+R[rega]]Twowordsofdataarereadfromtheeffectiveaddresscomputedbyaddingsignedintegerimm16andunsignedintegerR[rega]andstoredindoubleregisterD[dregb].Thisisequivalenttotwolfinstructions:F[fregb]←M[imm16+R[rega]]F[freg(b+1)]←M[imm16+R[rega]+4]whereF[freg(b+1)]isthenextfpregisterafterF[fregb]insequence,andallvaluesaresimplycopiedandnotconverted.)6ledEx:ledf8,f6if(D[drega]=D[dregb])fps=1elsefps=0Botharedoubleprecisionfloats.lefEx:leff3,f6if(F[frega]=F[fregb])fps=1elsefps=0Botharesingleprecisionfloats.lfEx:lff6,76(r4)F[fregb]←M[imm16+R[rega]]Onewordofdataisreadfromtheeffectiveaddresscomputedbyaddingsignedintegerimm16andsignedintegerR[rega]andstoredinfpregisterF[fregb].lhEx:lhr1,32(r3)R[regb]←(signextended)M[imm16+R[rega]]Twobytesofdataarereadfromtheeffectiveaddresscomputedbyaddingsignedintegerimm16andsignedintegerR[rega].Theaddressmustbehalf-wordaligned.Thehalf-wordfrommemoryisthensignextendedto32bitsandstoredinregisterR[regb].lhiEx:lhir3,#-40R[regb]←imm16##0^16Loadsthe16bitimmediatevalueimm16intothemostsignificanthalfofanintegerregisterandclearstheleastsignificanthalf.lhuEx:lhur2,-40+4(r3)R[regb]←0^16##M[imm16+R[rega]]Twobytesofdataarereadfromtheeffectiveaddresscomputedbyaddingsignedintegerimm16andsignedintegerR[rega].Theaddressmustbehalf-wordaligned.Thehalf-wordfrommemoryisthenzeroextendedto32bitsandstoredinregisterR[regb].ltdEx:ltdf8,f6if(D[drega]D[dregb])fps=1elsefps=0Botharedoubleprecisionfloats.ltf7Ex:ltff3,f6if(F[frega]F[fregb])fps=1elsefps=0Botharesingleprecisionfloats.lwEx:lwr19,label+63(r8)R[r
本文标题:DLX指令系统
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