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计组实验九老师:包健一、源代码测试模块代码:moduleTest_Top;//Inputsreginclk;regmem_clk;regrst;reg[3:0]SW;//Outputswire[7:0]LED;//InstantiatetheUnitUnderTest(UUT)Topuut(.inclk(inclk),.mem_clk(mem_clk),.rst(rst),.LED(LED),.SW(SW));reg[2:0]i;initialbegin//InitializeInputsinclk=0;mem_clk=0;rst=0;SW=0;i=0;//Wait100nsforglobalresettofinish#100;rst=1;#100;rst=0;#100;foreverbegin#100;mem_clk=~mem_clk;i=i+1;if(i==3'b000)inclk=~inclk;endendendmodule顶层模块代码:moduleMy_I_CPU(inputclk,inputmem_clk,inputrst,output[31:0]ALU_F,output[31:0]M_R_Data,outputZF,outputOF);wireclk_n=~clk;wire[31:0]codes;Inst_Fetch1inst_fetch(.rst(rst),.clk(clk),.Inst_codes(codes));wire[5:0]OP;wire[5:0]func;wire[2:0]ALU_OP;wirerd_rt_s;wireimm_s;wirert_imm_s;wirealu_mem_s;wireWrite_Reg;wireMem_Write;wire[15:0]imm;wire[31:0]imm_data;assignimm_data=(imm_s)?{{16{imm[15]}},imm}:{{16{1'b0}},imm};assignOP=codes[31:26];assignfunc=codes[5:0];assignimm=codes[15:0];OP_Decoderop_decoder(.OP(OP),//input.func(func),//input.ALU_OP(ALU_OP),.rd_rt_s(rd_rt_s),.imm_s(imm_s),.rt_imm_s(rt_imm_s),.alu_mem_s(alu_mem_s),.Write_Reg(Write_Reg),.Mem_Write(Mem_Write));wire[4:0]rs;wire[4:0]rt;wire[4:0]rd;assignrs=codes[25:21];assignrt=codes[20:16];assignrd=codes[15:11];wire[4:0]W_Addr;assignW_Addr=(rd_rt_s)?rt:rd;wire[31:0]W_Data;wire[31:0]R_Data_A;wire[31:0]R_Data_B;RegisterHeapregister(.R_Addr_A(rs),.R_Addr_B(rt),.W_Addr(W_Addr),.Write_Reg(Write_Reg),.Reset(rst),.Clk(clk_n),.W_Data(W_Data),.R_Data_A(R_Data_A),.R_Data_B(R_Data_B));wire[31:0]ALU_A;wire[31:0]ALU_B;assignALU_A=R_Data_A;assignALU_B=(rt_imm_s)?imm_data:R_Data_B;ALUalu(.ALU_OP(ALU_OP),.A(ALU_A),.B(ALU_B),.F(ALU_F),.ZF(ZF),.OF(OF));Data_Memdata_mem(.clka(mem_clk),//inputclka.wea(Mem_Write),//input[0:0]wea.addra(ALU_F),//input[5:0]addra.dina(R_Data_B),//input[31:0]dina.douta(M_R_Data)//output[31:0]douta);assignW_Data=(alu_mem_s)?M_R_Data:ALU_F;endmodule二、仿真波形三、电路图四、引脚配置NETLED[7]LOC=T11;NETLED[6]LOC=R11;NETLED[5]LOC=N11;NETLED[4]LOC=M11;NETLED[3]LOC=V15;NETLED[2]LOC=U15;NETLED[1]LOC=V16;NETLED[0]LOC=U16;//LEDNETinclkLOC=C9;NETmem_clkLOC=V10;//100mHZNETSW[3]LOC=M8;//右边4个开关NETSW[2]LOC=V9;NETSW[1]LOC=T9;NETSW[0]LOC=T10;NETrstLOC=D9;五、思考与探索2,给译码与控制单元增加一个控制信号,该信号在OP==6’b001111产生。在该信号的控制下,imm=imm16,即imm左移16位,地位补0,并将移位后的imm送入地址为rt的寄存器。由此便实现了该指令。3,其实编写实验八的过程也就是将前面所有的实验进行一次应用和巩固的过程。当然了,在这个实验中同样涉及到了IP核的应用。
本文标题:杭电计组实验报告9
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