基于EDA技术的数字时钟设计----最终版

物理与电子学院《》课程考核论文论文作者姓名：作者学号：所学专业：理科物理方向任课教师：高伟完成时间：2015年6月第1页共18页基于EDA技术的数字时钟设计目录摘要··················································································2一．绪论·············································································31.课题的研究背景·································································32.数字电子钟的发展简况·························································3二．系统设计········································································41.整体规划·········································································42.时基信号产生电路·······························································53.调时、调分信号的产生电路····················································54.计数显示电路····································································6三．基本功能实现···································································61.时钟计数··········································································72.校时设置··········································································73.清零功能··········································································84.定时、报时功能··································································9四．系统软件实现···································································91.详细模块描述·····································································92.总体设计及引脚设置·····························································9五．系统仿真及分析································································101.各模块时序仿真·································································102.总体时序仿真····································································113.实验结果·········································································11六．设计总结········································································12·参考文献···········································································12附录：参考程序······································································13第2页共18页摘要随着基于PLD的EDA技术的发展和应用领域的扩大与深入，EDA技术在电子信息、通信、自动控制及计算机应用等领域的重要性日益突出。本文详细介绍EDA课程设计任务——数字钟的设计的详细设计过程及结果，并总结出心得体会。主体：主要涉及模60与模24计数器、动态显示控制电路、分频器主要整点报时电路，这些电路都是以模块封装好的，以便其他电路调用。以计数器构成计时部件，通过分频器分出的1HZ脉冲计时，调用动态显示电路显示，通过整点报时电路控制蜂鸣器。在计数器级联时采用内部同步外部异步的方式，但通过简单的改变达到了同步的效果而且比同步还可靠。显示控制时为了节约资源采用动态原理。关键字多功能数字时钟整点报时EDA技术VHDL语言AbstractThisarticleisbasedontheQuartusIIsoftwareandthecorrespondingexperimentalplatformtocompleteamulti-functiondigitaltimerexperiment,sothatweclearlyunderstandtousdigitaltablefunctionishowtoachieve.Usedinthedesignoftheleveldesignthought,functiondecreasesprogressivelystepbystep.Theexperimentmainlyincludesthemainbody----thebasicfunctionsofthecircuitofclock.Subject:mainlyrelatestomode60andmode24counter,dynamicdisplayofcontrolcircuit,theprimarydividerthewholepointtimekeepingcircuit,thecircuitisinmoduleagoodpackage,sothatothercircuitcalls.Tocounterthroughafrequencydividerwhichtimingcomponents,from1HZpulsetiming,calleddynamicdisplaycircuitdisplays,throughthewholepointtimekeepingcircuitcontrolbuzzer.Incountercascadeusesinternalsynchronousexternalasynchronousmanner,butbysimplychangingthesynchronizationeffectandismorereliablethansynchronous.Displaycontrolinordertosaveresourcesbythedynamicprinciple.Keyword:LeveldesignMultifunctionaldigitalclockSynchronizationThewholepointtimekeepingThelanguageofVHDL第3页共18页一．绪论1.课题的研究背景当面对这样一个信息爆炸的时代，时间变得越来越宝贵，人们无疑需要一个良好的计划时间表，而这就需要一个系统完善成熟的定时系统来及时提醒人们。然而在这个新技术、新产品不断涌现，各类产品功能日益强大，这就需要我们带着战略性眼光选择。多功能数字电子钟无意是人们最好的选择之一，多功能数字时钟小巧、价格低廉，外观造型日益精美、精确度高、功能齐全、使用方便，不仅仅可以显示钟表的功能也具备计时、测温、定闹钟、显示日历、语音报表等功能，其集成化高而受到广大人们群众喜爱。在人们不断的要求下，多功能数字钟已经成为现代设计时钟研究生产的主导方向。2.数字电子钟的发展简况在国外，公元以前，人们也是主要利用天文现象来计时，比如观察太阳日出日落、星相的转移，此后当在德国的亨莱思创造了小型机械钟开始，国外的钟表行业逐渐掀起，到了19世纪，钟表制造业已经成为人们必不可少的一个行业，钟表制造业也逐渐的实现了工业化生产，在20世纪，随着电子潮流的飞速发展，钟表行业也出现了翻天覆地的变化，由单一的机械表转向多元式的钟表，有电池驱动钟、电机械表、指针式电子钟表、数字式电子钟表等种类，并且功能不断的增多如现在出现的多功能数字电子钟，它采用的是数字电路来显示分秒，它的作用早已不仅限于计时的功能，它还可以显示日历、定闹、报时、测温等功能。它人性化的设计给人们的生活带来了很多的方便，成为人们日常生活的必需品。二．系统设计1.整体规划数字电子时钟主干电路系统由秒信号发生器、“时、分、秒”计数器、译码器及显示器、校时电路、整点报时电路组成。将标准秒信号送入“秒计数器”，“秒计数器”采用60进制计数器，每累计60秒发出一个“分脉冲”信号，该信号将作为“分计数器”的时钟脉冲。“分计数器”也采用60进制计数器，每累计60分钟，发出一个“时脉冲”信号，该信号将被送到“时计数器”。“时计数器”采用12进制计时器，可实现12小时的累计。通过六个LED显示器显示出来。整点报时电路根据计时系统的输出状态产生一脉冲信号，然后去触发一音频发生器实现报时。校时电路用来对“时”、“分”、“秒”显示数字进行校对调整。第4页共18页电子时钟系统总体规划如图1所示：（1）根据电路特点，用层次设计概念，将此设计任务分成若干模块，规定每一模块的功能和各模块之间的接口，同时加深层次化设计概念。（2）软件的元件管理深层含义，以及模块元件之间的连接概念，对于不同目录下的同一设计，如何融合。（3）适配划分前后的仿真内容有何不同概念，仿真信号对象有何不同，有更深一步了解。（4）按适配划分后的引脚锁定，同相关功能模块硬件电路的接口连线。（5）所有模块采用VHDL硬件描述语言设计。图1总体方案框图第5页共18页2.时基信号产生电路数字钟以其显示时间的直观性、走时准确性作为一种计时工具，数字钟的基本组成部分离不开计数器，在控制逻辑电路的控制下完成预定的各项功能。由晶振产生的频率非常稳定的脉冲，经整形、稳定电路后，产生一个频率为1Hz的、非常稳定的计数时钟脉冲。3.调时、调分信号的产生电路由计数器的计数过程可知，正常计数时，当秒计数器（60进制）计数到59时，再来一个脉冲，则秒计数器清零，重新开始新一轮的计数，而进位则作为分计数器的计数脉冲，使分计数器计数加1。把秒计数器的进位脉冲和一个频率为2Hz的脉冲信号同时接到一个2选1数据选择器的两个数据输入端，而位选信号则接一个脉冲按键开关，当按键开关不按下去时（即为0），则数据选择器将秒计数器的进位脉冲送到分计数器，此时，数字钟正常工作；当按键开关按下去时（即为1），则数据选择器将另外一个2Hz的信号作为分计数器的计数脉冲，使其计数频率加快，当达到正确时间时，松开按键开关，从而达到调时的目的。调节小时的时间也一样的实现。4.计数显示电路由计数部分、数据选择器、译码器组成，是时钟的关键部分。1、计数部分：由两个60进制计数器和一个24进制计数器组成，其中60进制计数器可用6进制计数器和10进制计数器构成；24进制的小时计数同样可用6进制计数器和10进制计数器得到：当计数器计数到24时，“2”和“4”同时进行清零，则可实现24进制