数字式闹钟

1目录摘要······························································································································2Abstract························································································································3第一章方案设计··········································································································41.1设计任务··································41.2性能指标··································41.3怎样实现··································15第二章数字式闹钟电路设计···························································································62.1高精度秒信号发生器单元电路···············································································62.2“时”、“分”、“秒”单元电路·················································································62.3译码显示单元电路······························································································82.4校时单元电路····································································································92.5整点报时单元电路····························································································10第三章数字式闹钟仿真与实验························································································123.1秒、分电路仿真································································································123.2时电路仿真······································································································133.3整点报时电路仿真·····························································································13总结····························································································································15参考文献······················································································································16致谢························································································································17附录数字式闹钟明细表··································································································182摘要数字钟是一种用数字电路技术实现时、分、秒计时的装置，与机械式时钟相比具有更高的准确性和直观性，且无机械装置，具有更长的使用寿命，因此得到了广泛的使用。数字钟由秒信号发生器、计数器、译码器、显示器、校时电路、整点闹时电路等五部分组成。秒信号产生器是整个系统的时基信号，采用石英晶体振荡器可以实现计时的精度；将标准秒脉冲信号采用60进制计数器，每累计60s发出一个“分脉冲”信号，再将作为“分计时器”时钟脉冲，然该信号送到“时计数器”。“时计数器”采用24进制计数器，可实现对一个24h的累计。译码显示电路将计数器的输出状态七段显示译码器译码，通过六位LED显示器显示出来。整点闹时电路是根据计时系统的输出状态产生一个脉冲信号，然后去触发音频发生器来实现报时。校时电路是用来对“时”、“分”显示数字进行校对调整。运用Protel99SE软件绘制了单元电路以及总体电路图；借助Multisim2001仿真软件对单元电路以及总体电路进行了仿真虚拟实验，达到了预期的要求。关键词：闹钟；秒信号发生器；计数器；校时；整点报时；译码器3AbstractDigitalclockwithadigitalcircuittechnologyhours,minutesandsecondstimingdevices,andmechanicalclockhigherthantheaccuracyandintuitive,andnomechanicaldevices,amorelongerlife,ithasbeenWidelyused.Middle、Small-scaleintegratedcircuitdesignofdigitalelectroniccircuitsmainlybythefive-part：Secondsignalgenerator、Counter、Decoderanddisplay、Schoolcircuit.Secondsignalgeneratoristhewholesystematthebasesignal,whichdirectlydeterminetheaccuracyoftime,thegeneraluseofquartzcrystaloscillatortoachieve.Thestandardsecondpulseintothesecondtimer,the60-bandusingthetimercounter.“Timers”alsoused60-bandtimer,eachaccumulated60min,issuedapulsesignal,thesignalwillbesenttocounter..Counterina24-bandcounter,canberealizedforatotalof24h.thesignalwillserveassub-timerclockpulseDecodingcircuitwillshowthatwhenandpointsandsecondcounterstatusQiduanshowthattheoutputdecoderdecoding,throughsixLEDdisplaysshow.Thewholepointisbasedontime-circuitbroadcastsystemcreatesastateoftheoutputpulse,andthentotriggeraudiogeneratortoachievetimekeeping.Schoolcircuitisusedforwhenandpointsandsecondproof-readingadjustedfiguresshow.Protel99SEusemappingsoftwareunitoftheoverallcircuitandthecircuit;Multisim2001withthesimulationsoftwaremodulesandthewholecircuittocircuitsimulationvirtualexperiment,achievedtheexpecteddemand.Keywords：alarmclock，Secondsignalgenerator，Counter，Decoder，Thewholepointoftimekeepingcircuit，Schoolcircuit4第一章方案设计1.1设计任务数字式闹钟1.2性能指标1.2.1高精度、高稳定度的时钟信号源1.2.2时钟功能：具有24小时计时方式，显示时、分、秒。1.2.3整点闹时功能和对时功能1.2.4能设定起闹时刻，响闹时间为1min，超过1min自动停止，具有人工止闹功能；止闹后不再重新操作，将不再发生起闹。1.2.5计时准确度：每天计时误差不超过10s。1.3怎样实现1.3.1、时钟信号源：它是由晶体振荡器发生的脉冲，经过整形、分频获得1Hz的秒脉冲，整个电路开始工作。而晶体振荡器具有高精度、高稳定度的功能。1.3.2用秒脉冲做信号源，构成数字钟显示秒、分、时：当标准秒脉冲信号送入“秒计时器”，电子钟开始计时，译码显示电路将“时”、“分”、“秒”计数器的输出状态七段显示译码器译码，通过六位LED显示器显示出来。译码显示电路显示00：00：00。每一个秒脉冲信号输入时，译码显示器上的数字就按顺序递增。该计时器采用60进制计数器，即每累计60s发出一个“分脉冲”信号，该信号将作为“分计时器”时钟脉冲，此时秒计时器清零，重新计数。也就是说当在数字显示器上显示00：00：59时，秒脉冲信号再一次输入时，数字显示器就会显示00：01：00。同理分计时器和时计时器也同秒计时器一样工作。“分计时器”也采用60进制计时器，每累计60min，发出一个“时脉冲”信号，该信号将被送到“时计数器”。“时计数器”采用24进制计数器，可实现对一个24h的累计。1.3.3整点闹时功能和对时功能：整点报时功能是根据计时系统的输出状态产生一个脉冲信号，利用音频发生器，实现在整点前鸣叫5次低音（500HZ），整点时再鸣叫一次高音（1000HZ左右），共鸣叫6响，两次鸣叫间隔0.5s。每天计时误差不超过10s。1.3.4校时功能：对“时”、“分”、“秒”显示数字进行校对调整。1.4组成部分数字式闹钟一般由振荡器、分频器、计数器、译码器、显示器及部分扩展电路等组成。用晶体振荡器产生的脉冲，经过整形分频获得1Hz秒脉冲,做为信号发生器，74系列做为5进制计数器，一些门电路做为校时电路，以及一些外围电路组成。其数字式闹钟系统框图如下图所示。图1基于分立元件数字闹钟总体框图时显示器分显示器秒时显示器时译码器分译码器秒译码器时计时器分计时器秒计时器时钟校准振荡器分频器秒脉冲整点闹时6第二章数字式闹钟电路设计单元电路设计包括电路结构以及元器件的选择。尽可能选择性价比高、体积小、易购买的元器件。2.1高精度秒信号发生器单元电路该单元电路主要是产生整个系统的时基信号，它的精度和稳定度决定了数字闹钟的质量，通过常用晶体振荡器产生的脉冲，经过整形分频获得1