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1数字集成电路分析与设计,课后作业#6a长沙理工大学物理与电子科学学院(内部资料,请勿扩散及传播)数字集成电路分析与设计,2018春季课后作业#6a(WithSolution)Unlessotherwisenoted,youshouldassumethefollowingparametersforalloftheproblemsinthishomework:NMOS:L=100nm,VTn=0.25V,μn=350cm2/(V·s),COX=0.95µF/cm2,vsat=1e7cm/s,λ=0PMOS:L=100nm,|VTp|=0.25V,μp=175cm2/(V·s),COX=0.65µF/cm2,vsat=1e7cm/s,λ=0PROBLEM1:PowerandDelayThroughoutthisproblem,youshouldignoreallthecapacitorsassociatedwiththetransistors–i.e.,youcanassumethattheonlycapacitorsarethoseexplicitlyshowninthecircuit.Also,youcanignoreshoot-throughcurrent,andyoucanassumethattheleakagecurrentisequalto.,where,4and,2.Nowconsiderthe2-inputNANDgateshownbelow:Figure3(a)a)Calculatetheleakagecurrentforall4possiblestatesofthe2inputsAandB.Solution:Foreachofthe4differentinputcombinations,differenttransistorswillbeintheONorOFFstates.i.A=0V,B=0V(OUT=1.2V)2数字集成电路分析与设计,课后作业#6a长沙理工大学物理与电子科学学院(内部资料,请勿扩散及传播)FigureS3(i)BothNMOStransistorsareOFF,thusmakingthepull-downstacklooklikeasingletransistorwithtwicethelength.Theleakagecurrentisgivenby:,....ii.A=0V,B=1.2V(OUT=1.2V)FigureS3(ii)NMOStransistorBhasVGSVT,whileNMOStransistorAisOFF.WhilePMOStransistorBisOFF,PMOStransistorAisONandthereforedrivestheoutputtoVDD.Therefore,theonlytransistorthatisleakingistheNMOStransistorA:,.3数字集成电路分析与设计,课后作业#6a长沙理工大学物理与电子科学学院(内部资料,请勿扩散及传播)...iii.A=1.2V,B=0V(OUT=1.2V)FigureS3(iii)PMOStransistorBisONwhilePMOStransistorAisOFF.So,theoutputisonceagaindriventoVddandsonoleakagecurrentflowsthroughPMOStransistorA(sinceithaszeroVDS)..NMOStransistorBisOFF,whileNMOStransistorAis“weakly”ON–i.e.,itssourceisatVdd-VT.butitstillcaneasilyconducttheleakagecurrentfromNMOStransistorBTherefore,theleakagecurrentisidenticaltocaseii.,i.e.50.91nA.iv.A=1.2V,B=1.2V(OUT=0V)FigureS3(iv)BothPMOStransistorsareOFF,thussettingtheleakagecurrent,whichisgivenbytwicetheleakagecurrentofasinglePMOStransistor:4数字集成电路分析与设计,课后作业#6a长沙理工大学物理与电子科学学院(内部资料,请勿扩散及传播),....b)AssumingthattheinputsAandBaredrivenwiththewaveformsshownbelowinFigure3(b)andthatthesewaveformsrepeatevery3ns,calculatetheaveragedynamicpowerdrawnfromthesupply.Figure3(b)Solution:WecanuseP,P,,CLαCLfCLVDDtofindtheaveragedynamicpowerforeachcycle.Todothis,weneedtofindtheactivityfactoraswellasthefrequencyofrepetition.Forthispurpose,itisinstructivetolookattheoutputwaveform:FigureS3(b)5数字集成电路分析与设计,课后作业#6a长沙理工大学物理与电子科学学院(内部资料,请勿扩散及传播)Fromtheoutputwaveform,wecanseethattherearetwolow-to-hightransitionsattheOUTnodefor3cyclesof1ns.Hence,activityfactoris(2/3)forafrequencyof1/(1ns)=1GHz.(Notethatyoucouldhavealsochosenf=1/3ns,inwhichcasetheactivityfactorwouldhavebeen2.)Thetotaldynamicpoweristherefore:,..c)Calculatetheaveragetotalpowerdrawnfromthesupplywiththesameinputsshowninpartb).Solution:Sincewealreadyfoundtheaveragedynamicpowerfrompartb),wejustneedtofindtheaverageleakagepowerandaddittotheaveragedynamicpower.TheaverageleakagepoweristheweightedmeanoftheleakagepowersforthedifferentinputcombinationsatAandB:,:,:,:,:,.....Hence,theaveragetotalpoweris:,,,,,....PROBLEM2:BusofSignalsInthisproblemwewillbelookingatabusofdatasignalsthatmightexistinordertotransferdatafromonepartofthechiptoanother.Youshouldassumethatthewiresare1mmlongandimplementedinM3(whichhasaminimumwidthof0.2μm,Rw=0.075Ω/□)andarerunningoveractive.Youcanalsoassumethattherearenohighermetallayersrunningaboveitandthatthewiresarelayedoutattheminimumallowedspacing.Usetable4-2,4-3inthetextbooktofindtheunitcapacitancevalues.a)Whatisthetotalresistanceofeachwire?Solution:6数字集成电路分析与设计,课后作业#6a长沙理工大学物理与电子科学学院(内部资料,请勿扩散及传播)Theresistanceofthewireis:./.b)Whatisthetotalcapacitanceofeachwiretoground?Howaboutthetotalcapacitancetoeachofitsneighbors?Solution:FromthetablesinthebookwegetthefollowingvaluesfortheparametersoftheM3wire:Cpp=9.4aF/um2,Cfringe=19aF/um,Cinter=85aF/um.Thetotalcapacitancetogroundofeachwireis./·.··/·.Thecapacitanceofeachwiretoits2neighborsis·/·c)Assumingthebushasonly3wires,whatisworstcaseenergypulledoutofthesupplyofthemiddledriverforonetransition(youcanignorethecapacitancethatcomesfromtransistors)?Underwhatconditionpatternofinputstothebusdoesthisoccur?Solution:TheworstcaseenergypulledoutofsupplyofthemiddledriverforonetransitioniswhenitchangesfromLowtoHighwhilebothofitsneighborschangefromHightoLow.Inthissituation,thevoltageswingthattheinterwirecapacitanceseesisdoubled,whichmeansthattwiceasmuchchargemustbepulledfromthesupplyinordertochargethesecapacitors.Inotherwords,thedriverforthemiddlewireseesdoubletheinter-wirecapacitance.Therefore,theenergyis:21.22·17039.88547.03
本文标题:数字集成电路设计
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