CD54HC4046AF3A中文资料

CD54HC4046AF3A中文资料DatasheetacquiredfromHarrisSemiconductorSCHS204JFeatures?OperatingFrequencyRange-Upto18MHz(Typ)atVCC=5V-MinimumCenterFrequencyof12MHzatVCC=4.5V?ChoiceofThreePhaseComparators-EXCLUSIVE-OR-Edge-TriggeredJKFlip-Flop-Edge-TriggeredRSFlip-Flop?ExcellentVCOFrequencyLinearity?VCO-InhibitControlforON/OFFKeyingandforLowStandbyPowerConsumption?MinimalFrequencyDrift?OperatingPowerSupplyVoltageRange-VCOSection..........................3Vto6V-DigitalSection........................2Vto6V?Fanout(OverTemperatureRange)-StandardOutputs...............10LSTTLLoads-BusDriverOutputs.............15LSTTLLoads?WideOperatingTemperatureRange...-55oCto125oC?BalancedPropagationDelayandTransitionTimes?Signi?cantPowerReductionComparedtoLSTTLLogicICs?HCTypes-2Vto6VOperation-HighNoiseImmunity:NIL=30%,NIH=30%ofVCCatVCC=5V?HCTTypes-4.5Vto5.5VOperation-DirectLSTTLInputLogicCompatibility,VIL=0.8V(Max),VIH=2V(Min)-CMOSInputCompatibility,Il≤1μAatVOL,VOHApplications?FMModulationandDemodulation?FrequencySynthesisandMultiplication?FrequencyDiscrimination?ToneDecoding?DataSynchronizationandConditioning?Voltage-to-FrequencyConversion?Motor-SpeedControlDescriptionThe’HC4046Aand’HCT4046Aarehigh-speedsilicon-gateCMOSdevicesthatarepincompatiblewiththeCD4046Bofthe“4000B”series.TheyarespecifiedincompliancewithJEDECstandardnumber7.The’HC4046Aand’HCT4046Aarephase-locked-loopcircuitsthatcontainalinearvoltage-controlledoscillator(VCO)andthreedifferentphasecomparators(PC1,PC2andPC3).Asignalinputandacomparatorinputarecommontoeachcomparator.Thesignalinputcanbedirectlycoupledtolargevoltagesignals,orindirectlycoupled(withaseriescapacitor)tosmallvoltagesignals.Aself-biasinputcircuitkeepssmallvoltagesignalswithinthelinearregionoftheinputamplifiers.Withapassivelow-passfilter,the4046Aformsasecond-orderloopPLL.TheexcellentVCOlinearityisachievedbytheuseoflinearop-amptechniques.OrderingInformationPARTNUMBERTEMP.RANGE(oC)PACKAGECD54HC4046AF3A-55to12516LdCERDIPCD54HCT4046AF3A-55to12516LdCERDIPCD74HC4046AE-55to12516LdPDIPCD74HC4046AM-55to12516LdSOICCD74HC4046AMT-55to12516LdSOICCD74HC4046AM96-55to12516LdSOICCD74HC4046ANSR-55to12516LdSOPCD74HC4046APWR-55to12516LdTSSOPCD74HC4046APWT-55to12516LdTSSOPCD74HCT4046AE-55to12516LdPDIPCD74HCT4046AM-55to12516LdSOICCD74HCT4046AMT-55to12516LdSOICCD74HCT4046AM96-55to12516LdSOICNOTE:Whenordering,usetheentirepartnumber.Thesuf?xes96andRdenotetapeandreel.Thesuf?xTdenotesasmall-quantityreelof250.February1998-RevisedDecember2021CD54HC4046A,CD74HC4046A,CD54HCT4046A,CD74HCT4046AHigh-SpeedCMOSLogicPhase-LockedLoopwithVCO[/Title(CD74HC4046A,CD74HCT4046A)/Sub-ject(High-SpeedCMOS元器件交易网(CERDIP)CD74HC4046A(PDIP,SOIC,SOP,TSSOP)CD74HCT4046A(PDIP,SOIC)TOPVIEWFunctionalDiagram14151691312111012345768PCPOUTPC1OUTCOMPINVCOOUTINHC1AGNDC1BVCCSIGINPC2OUTR2R1DEMOUTVCOINPC3OUT104VCOOUTDEMOUT56712C1AR1VCOININH911C1BR2151132PC1OUTPC3OUTPC2OUTPCPOUT143COMPINSIGINφVCOPinDescriptionsPINNUMBERSYMBOLNAMEANDFUNCTION1PCPOUTPhaseComparatorPulseOutput2PC1OUTPhaseComparator1Output3COMPINComparatorInput4VCOOUTVCOOutput5INHInhibitInput6C1ACapacitorC1ConnectionA7C1BCapacitorC1ConnectionB8GNDGround(0V)9VCOINVCOInput10DEMOUTDemodulatorOutput11R1ResistorR1Connection12R2ResistorR2Connection13PC2OUTPhaseComparator2Output14SIGINSignalInput15PC3OUTPhaseComparator3Output16VCCPositiveSupplyVoltageGeneralDescriptionVCOTheVCOrequiresoneexternalcapacitorC1(betweenC1AandC1B)andoneexternalresistorR1(betweenR1andGND)ortwoexternalresistorsR1andR2(betweenR1andGND,andR2andGND).ResistorR1andcapacitorC1determinethefrequencyrangeoftheVCO.ResistorR2enablestheVCOtohaveafrequencyoffsetifrequired.Seelogicdiagram,Figure1.ThehighinputimpedanceoftheVCOsimpli?esthedesignoflow-pass?ltersbygivingthedesignerawidechoiceofresistor/capacitorranges.Inordernottoloadthelow-pass?lter,ademodulatoroutputoftheVCOinputvoltageisprovidedatpin10(DEMOUT).IncontrasttoconventionaltechniqueswheretheDEMOUTvoltageisonethresholdvoltagelowerthantheVCOinputvoltage,heretheDEMOUTvoltageequalsthatoftheVCOinput.IfDEMOUTisused,aloadresistor(RS)shouldbeconnectedfromDEMOUTtoGND;ifunused,DEMOUTshouldbeleftopen.TheVCOoutput(VCOOUT)canbeconnecteddirectlytothecomparatorinput(COMPIN),orconnectedviaafrequency-divider.TheVCOoutputsignalhasaspeci?eddutyfactorof50%.ALOWlevelattheinhibitinput(INH)enablestheVCOanddemodulator,whileaHIGHlevelturnsbothofftominimizestandbypowerconsumption.PhaseComparatorsThesignalinput(SIGIN)canbedirectlycoupledtotheself-biasingampli?eratpin14,providedthatthesignalswingisbetweenthestandardHCfamilyinputlogiclevels.Capacitivecouplingisrequiredforsignalswithsmallerswings.PhaseComparator1(PC1)ThisisanExclusive-ORnetwork.Thesignalandcomparatorinputfrequencies(fi)musthavea50%dutyfactortoobtainthemaximumlockingrange.ThetransfercharacteristicofPC1,assumingripple(fr=2fi)issuppressed,is:VDEMOUT=(VCC/π)(φSIGIN-φCOMPIN)whereVDEMOUTisthedemodulatoroutputatpin10;VDEMOUT=VPC1OUT(vialow-pass?lter).TheaverageoutputvoltagefromPC1,fedto