简单UVM验证环境的搭建

//===========================================================//filelist.f+incdir+$UVM_HOME/src$UVM_HOME/src/uvm_pkg.sv$WORK_HOME/src/ch2/dut/dut.svtop_tb.sv//===========================================================//dut.svmoduledut(clk,rst_n,rxd,rx_dv,txd,tx_en);inputclk;inputrst_n;input[7:0]rxd;inputrx_dv;output[7:0]txd;outputtx_en;reg[7:0]txd;regtx_en;always@(posedgeclk)beginif(!rst_n)begintxd=8'b0;tx_en=1'b0;endelsebegintxd=rxd;tx_en=rx_dv;endendendmodule//===========================================================//top_tb.sv`timescale1ns/1ps`includeuvm_macros.svhimportuvm_pkg::*;`includemy_if.sv`includemy_transaction.sv`includemy_sequencer.sv`includemy_driver.sv`includemy_monitor.sv`includemy_agent.sv`includemy_model.sv`includemy_scoreboard.sv`includemy_env.sv`includebase_test.sv`includemy_case0.sv`includemy_case1.svmoduletop_tb;regclk;regrst_n;reg[7:0]rxd;regrx_dv;wire[7:0]txd;wiretx_en;my_ifinput_if(clk,rst_n);my_ifoutput_if(clk,rst_n);dutmy_dut(.clk(clk),.rst_n(rst_n),.rxd(input_if.data),.rx_dv(input_if.valid),.txd(output_if.data),.tx_en(output_if.valid));initialbeginclk=0;foreverbegin#100clk=~clk;endendinitialbeginrst_n=1'b0;#1000;rst_n=1'b1;endinitialbeginrun_test();endinitialbeginuvm_config_db#(virtualmy_if)::set(null,uvm_test_top.env.i_agt.drv,vif,input_if);uvm_config_db#(virtualmy_if)::set(null,uvm_test_top.env.i_agt.mon,vif,input_if);uvm_config_db#(virtualmy_if)::set(null,uvm_test_top.env.o_agt.mon,vif,output_if);endendmodule//===========================================================//my_env.sv`ifndefMY_ENV__SV`defineMY_ENV__SVclassmy_envextendsuvm_env;my_agenti_agt;my_agento_agt;my_modelmdl;my_scoreboardscb;uvm_tlm_analysis_fifo#(my_transaction)agt_scb_fifo;uvm_tlm_analysis_fifo#(my_transaction)agt_mdl_fifo;uvm_tlm_analysis_fifo#(my_transaction)mdl_scb_fifo;functionnew(stringname=my_env,uvm_componentparent);super.new(name,parent);endfunctionvirtualfunctionvoidbuild_phase(uvm_phasephase);super.build_phase(phase);i_agt=my_agent::type_id::create(i_agt,this);o_agt=my_agent::type_id::create(o_agt,this);i_agt.is_active=UVM_ACTIVE;o_agt.is_active=UVM_PASSIVE;mdl=my_model::type_id::create(mdl,this);scb=my_scoreboard::type_id::create(scb,this);agt_scb_fifo=new(agt_scb_fifo,this);agt_mdl_fifo=new(agt_mdl_fifo,this);mdl_scb_fifo=new(mdl_scb_fifo,this);endfunctionexternvirtualfunctionvoidconnect_phase(uvm_phasephase);`uvm_component_utils(my_env)endclassfunctionvoidmy_env::connect_phase(uvm_phasephase);super.connect_phase(phase);i_agt.ap.connect(agt_mdl_fifo.analysis_export);mdl.port.connect(agt_mdl_fifo.blocking_get_export);mdl.ap.connect(mdl_scb_fifo.analysis_export);scb.exp_port.connect(mdl_scb_fifo.blocking_get_export);o_agt.ap.connect(agt_scb_fifo.analysis_export);scb.act_port.connect(agt_scb_fifo.blocking_get_export);endfunction`endif//===========================================================//my_if.sv`ifndefMY_IF__SV`defineMY_IF__SVinterfacemy_if(inputclk,inputrst_n);logic[7:0]data;logicvalid;endinterface`endif//===========================================================//my_transaction.sv`ifndefMY_TRANSACTION__SV`defineMY_TRANSACTION__SVclassmy_transactionextendsuvm_sequence_item;randbit[47:0]dmac;randbit[47:0]smac;randbit[15:0]ether_type;randbytepload[];randbit[31:0]crc;constraintpload_cons{pload.size=46;pload.size=1500;}functionbit[31:0]calc_crc();return32'h0;endfunctionfunctionvoidpost_randomize();crc=calc_crc;endfunction`uvm_object_utils_begin(my_transaction)`uvm_field_int(dmac,UVM_ALL_ON)`uvm_field_int(smac,UVM_ALL_ON)`uvm_field_int(ether_type,UVM_ALL_ON)`uvm_field_array_int(pload,UVM_ALL_ON)`uvm_field_int(crc,UVM_ALL_ON)`uvm_object_utils_endfunctionnew(stringname=my_transaction);super.new();endfunctionendclass`endif//===========================================================//my_sequencer.sv`ifndefMY_SEQUENCER__SV`defineMY_SEQUENCER__SVclassmy_sequencerextendsuvm_sequencer#(my_transaction);functionnew(stringname,uvm_componentparent);super.new(name,parent);endfunction`uvm_component_utils(my_sequencer)endclass`endif//===========================================================//my_driver.sv`ifndefMY_DRIVER__SV`defineMY_DRIVER__SVclassmy_driverextendsuvm_driver#(my_transaction);virtualmy_ifvif;`uvm_component_utils(my_driver)functionnew(stringname=my_driver,uvm_componentparent=null);super.new(name,parent);endfunctionvirtualfunctionvoidbuild_phase(uvm_phasephase);super.build_phase(phase);if(!uvm_config_db#(virtualmy_if)::get(this,,vif,vif))`uvm_fatal(my_driver,virtualinterfacemustbesetforvif!!!)endfunctionexterntaskmain_phase(uvm_phasephase);externtaskdrive_one_pkt(my_transactiontr);endclasstaskmy_driver::main_phase(uvm_phasephase);vif.data=8'b0;vif.valid=1'b0;while(!vif.rst_n)@(posedgevif.clk);while(1)beginseq_item_port.get_next_item(req);drive_one_pkt(req);seq_item_port.item_done();endendtasktaskmy_driver::drive_one_pkt(my_transactiontr);byteunsigneddata_q[];intdata_size;data_size=tr.pack_bytes(data_q)/8;`uvm_info(my_driver,begintodriveonepkt,UVM_LOW);repeat(3)@(posedgevif.clk);fo