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第1页共10页I2CArbitration6A软件设计第一部分原理图1.1FPGA_51_External_Memory.SchDocDIPSWITCH[7..0]CLKRSTEAP0_OUT[7..0]EXT_ADDRESS[16..0]EXT_RAM1_DATA[7..0]EXT_CSEXT_RAM1_WREXT_RAM1_OEEXT_RAM0_DATA[7..0]EXT_RAM0_WREXT_RAM0_OEMEM_SELECTS1Ext_Mem.SchDocDIPSWITCH0DIPSWITCH3VCCTCKTMSTDITDOTRSTJTAG.JTAGJTAGJTAGJTAGJTAG..JTAG_NEXUS_TMSPXXPXXJTAG_NEXUS_TCKPXXPXXJTAG_NEXUS_TDOPXXPXXJTAG_NEXUS_TDIPXXPXXTEST_BUTTONPXXPXXCLK_BRDPXXPXXRAM1_WEPXXPXXRAM1_DATA[7..0]PXX,PXX,PXX,PXX,PXX,PXX.PXX,PXXPXX,PXX,PXX,PXX,PXX,PXX.PXX,PXXRAM1_OEPXXPXXRAM_CSPXXPXXRAM0_OEPXXPXXRAM0_WEPXXPXXRAM0_DATA[7..0]PXX,PXX,PXX,PXX,PXX,PXX.PXX,PXXPXX,PXX,PXX,PXX,PXX,PXX.PXX,PXXRAM_ADDR[16..0]PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXXPXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX256KSRAMLEDS[7..0]PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXXPXX,PXX,PXX,PXX,PXX,PXX,PXX,PXXSW[7..0]PXX,PXX,PXX,PXX,PXX,PXX,PXX,PXXPXX,PXX,PXX,PXX,PXX,PXX,PXX,PXX12345678ONCLKDELAY[7..0]INITU1FPGA_STARTUP8U2OR2N1SVCC第2页共10页1.2Ext_Mem.SchDocCLKRSTEAP0_OUT[7..0]EXT_ADDRESS[16..0]EXT_RAM0_DATA[7..0]EXT_CSEXT_RAM0_WREXT_RAM0_OEEXT_RAM1_DATA[7..0]EXT_RAM1_WREXT_RAM1_OEMEM_SELECTEXT_CSE_RAM_ADDR[15..0]E_RAM_DATAI[7..0]E_RAM_DATAO[7..0]E_RAM_RDE_RAM_WREXT_ADDRESS[16..0]MEM_SELECTEXT_RAM0_DATA[7..0]EXT_RAM0_OEEXT_RAM0_WREXT_RAM1_DATA[7..0]EXT_RAM1_OEEXT_RAM1_WRE_ROM_RDE_ROM_WREXT_MEM_CTRL1Ext_Mem_Ctrl.VhdTSK51AOCDMicroprocessorCLKRSTEASFRDATAO[7..0]SFRDATAI[7..0]SFRADDR[6..0]SFRWRSFRRDROMDATAO[7..0]ROMDATAI[7..0]ROMADDR[15..0]ROMWRROMRDINT0INT1T0T1RXDTXDRXDOP0O[7..0]P0I[7..0]P1O[7..0]P1I[7..0]P2O[7..0]P2I[7..0]P3O[7..0]P3I[7..0]MEMDATAO[7..0]MEMDATAI[7..0]MEMADDR[15..0]MEMWRMEMRDPSWRPSRDP1TSK51A_DVCC[9..0][9..0]CLKDOUT[7..0]ADDR[9..0]DIN[7..0]WEM1RAMS_8x1K第3页共10页1.3Ext_Mem_Ctrl.VHDlibraryIEEE;useIEEE.std_logic_1164.all;entityEXT_MEM_CTRLisport(--SelectsthebehaviourofthetwoexternalmemorychipsMEM_SELECT:instd_logic;--Externaldata/programMemorycontrolsignals-controlfromthecoreE_RAM_WR:instd_logic;E_RAM_RD:instd_logic;E_ROM_WR:instd_logic;E_ROM_RD:instd_logic;E_RAM_DATAI:instd_logic_vector(7downto0);E_RAM_DATAO:outstd_logic_vector(7downto0);E_RAM_ADDR:instd_logic_vector(15downto0);--Externalmemoryinterface-goingdirectlytothememorychipEXT_RAM0_DATA:inoutstd_logic_vector(7downto0);EXT_RAM0_WR:outstd_logic;EXT_RAM0_OE:outstd_logic;EXT_RAM1_DATA:inoutstd_logic_vector(7downto0);EXT_RAM1_WR:outstd_logic;EXT_RAM1_OE:outstd_logic;EXT_ADDRESS:outstd_logic_vector(16downto0);EXT_CS:outstd_logic);endEXT_MEM_CTRL;------------------------------------------------------------第4页共10页------------------------------------------------------------architecturertlofEXT_MEM_CTRLisbegin--ifMEM_SELECTis1then--RAM0_DATAisthedatamemory--RAM1_DATAistheprogrammemory--RAM_DATAisconnectedtoRAM0_DATAwhichisthedatamemory--ROM_DATAisconnectedtoRAM1_DATAwhichistheprogrammemory--theRAM0controlsignalsaretiedtotheprocessorRAM--theRAM1controlsignalsaretiedtotheprocessorROM----otherwise----RAM1_DATAisthedatamemory--RAM0_DATAistheprogrammemory--RAM_DATAisconnectedtoRAM1_DATAwhichisthedatamemory--ROM_DATAisconnectedtoRAM0_DATAwhichistheprogrammemory--theRAM0controlsignalsaretiedtotheprocessorROM--theRAM1controlsignalsaretiedtotheprocessorRAM--process(E_RAM_WR,E_ROM_WR,E_RAM_RD,E_ROM_RD,MEM_SELECT,E_RAM_DATAI,EXT_RAM0_DATA,EXT_RAM1_DATA)beginifMEM_SELECT='1'thenifE_RAM_WR='1'thenEXT_RAM0_DATA=E_RAM_DATAI;elseEXT_RAM0_DATA=(others='Z');endif;第5页共10页ifE_ROM_WR='1'thenEXT_RAM1_DATA=E_RAM_DATAI;elseEXT_RAM1_DATA=(others='Z');endif;ifE_RAM_RD='1'thenE_RAM_DATAO=EXT_RAM0_DATA;elsifE_ROM_RD='1'thenE_RAM_DATAO=EXT_RAM1_DATA;elseE_RAM_DATAO=(others='-');endif;EXT_RAM0_WR=notE_RAM_WR;EXT_RAM0_OE=notE_RAM_RD;EXT_RAM1_WR=notE_ROM_WR;EXT_RAM1_OE=notE_ROM_RD;elseifE_RAM_WR='1'thenEXT_RAM1_DATA=E_RAM_DATAI;elseEXT_RAM1_DATA=(others='Z');endif;ifE_ROM_WR='1'thenEXT_RAM0_DATA=E_RAM_DATAI;elseEXT_RAM0_DATA=(others='Z');endif;第6页共10页ifE_RAM_RD='1'thenE_RAM_DATAO=EXT_RAM1_DATA;elsifE_ROM_RD='1'thenE_RAM_DATAO=EXT_RAM0_DATA;elseE_RAM_DATAO=(others='-');endif;EXT_RAM0_WR=notE_ROM_WR;EXT_RAM0_OE=notE_ROM_RD;EXT_RAM1_WR=notE_RAM_WR;EXT_RAM1_OE=notE_RAM_RD;endif;endprocess;--ChipselectoftheexternalmemoryisactivelowEXT_CS='0';--AddressfromtheprocessorisconnectedstraighttotheexternaladdressEXT_ADDRESS='0'&E_RAM_ADDR;endrtl;------------------------------------------------------------第7页共10页1.4Ext_Mem_Ctrl.ASM;...............................................................................EAL.equ0AFH;P0.equ80H;P1.equ90H;P2.equ0A0H;P3.equ0B0H;DPL.equ82H;DPH.equ83H;PSW.equ0D0H;ACC.equ0E0H;...............................................................................;...............................................................................MainCountLow.equ38HRightShift.equ42HLeftShift.equ43HCountInner.equ40HCountOuter.equ41HExtMemCnt.equ44H;................................................................................SectionText,Code;.org0000HMainProc:;................................................................
本文标题:Altium教程I2C Arbitration 6A软件设计0224
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