数字电路设计CH32

3.2加法器和数值比较器3.2.1加法器一、半加器和全加器1.半加器（HalfAdder）两个1位二进制数相加不考虑低位进位。iiBAiiCS0001101100101001iiiiiBABASiiiBAC真值表函数式BAAi+Bi=Si(和)Ci(进位)逻辑图曾用符号国标符号半加器（HalfAdder）Si&AiBi=1CiΣCOSiAiBiCiHASiAiBiCiiiiiiBABASiiiBAC函数式BA2.全加器（FullAdder）两个1位二进制数相加，考虑低位进位。Ai+Bi+Ci-1(低位进位)=Si(和)Ci(向高位进位)1011---A1110---B+---低位进位100101111真值表1-1-1-1-iiiiiiiiiiiiiCBACBACBACBAS1111iiiiiiiiiiiiiCBACBACBACBAC标准与或式ABCi-1000001010011100101110111SiCiABCi-1SiCi0010100110010111---S高位进位←0卡诺图全加器（FullAdder）ABC01000111101111SiABC01000111101111Ci圈“0”1111iiiiiiiiiiiiiCBACBACBACBAS11iiiiiiiCBCABAC1-1-1-1-iiiiiiiiiiiiiCBACBACBACBAS11iiiiiiiCBCABAC最简与或式圈“1”逻辑图(a)用与门、或门和非门实现曾用符号国标符号ΣCOCISiAiBiCi-1CiFASiAiBiCi-1Ci&&&&&&&≥1111AiSiCiBiCi-1≥1(b)用与或非门和非门实现1111iiiiiiiiiiiiiCBACBACBACBAS11iiiiiiiCBCABAC&≥1&≥1111CiSiAiBiCi-13.集成全加器TTL：74LS183CMOS：C661双全加器1234567141312111098C661VDD2Ai2Bi2Ci-11Ci1Si2Si1Ci-12Ci1Ai1BiVSS74LS183VCC2Ai2Bi2Ci-12Ci2SiVCC2A2B2CIn2COn+12F1A1B1CIn1FGND1Ai1Bi1Ci-11Si地1Ci1COn+1二、加法器（Adder）实现多位二进制数相加的电路1.4位串行进位加法器特点：电路简单，连接方便速度低=4tpdtpd—1位全加器的平均传输延迟时间01230123BBBBBAAAAAC0S0B0A0C0-1COSCIC1S1B1A1COSCIC2S2B2A2COSCIC3S3B3A3COSCI2.超前进位加法器作加法运算时，总进位信号由输入二进制数直接产生。1000000)(CBABAC011111)(CBABAC1000001111)()(CBABABABA特点优点：速度快缺点：电路比较复杂1)(iiiiiiCBABAC1000000)(CBABAC10000011111)()(CBABABABAC超前进位电路ΣS3ΣS2ΣS1ΣS0C3A3B3A2B2A1B1A0B0C0-1CICICICIC0C1C2集成芯片CMOS：CC4008TTL：7428374LS283应用举例8421BCD码→余3码3.2.2数值比较器（DigitalComparator）一、1位数值比较器00011011010001100010真值表函数式逻辑图—用与非门和非门实现AiBiLiGiMiLi(AB)Gi(A=B)Mi(AB)iiiBALiiiBAMiiiBALiiiiiBABAGiiiBAMiiiiiBABAG=Ai⊙Bi1位比较器AiBiAi&1&1&BiMiGiLiiiBAiiBA二、4位数值比较器A=A3A2A1A0ABL=1A=BM=1ABG=1真值表比较输入输出A3B3A2B2A1B1A0B0LGM100=100==100===100====010001=001==001===001B=B3B2B1B0LGM4位数值比较器A3B3A2B2A1B1A0B0&&1&1&&1&1&&1&1&≥1≥1&1&1&≥1≥1MLGA2A1B3A3B2B1B0≥1A0G=(A3⊙B3)(A2⊙B2)(A1⊙B1)(A0⊙B0)4位数值比较器M=A3B3+(A3⊙B3)A2B2+(A3⊙B3)(A2⊙B2)A1B1+(A3⊙B3)(A2⊙B2)(A1⊙B1)A0B0L=M+G1位数值比较器3M3G2M2G1M1G0M0GAiMiBiAi⊙BiAiBiLiGiAiBi&1&1&比较输入级联输入输出A3B3A2B2A1B1A0B0ABA=BABFABFA=BFAB001=001==001===001====001001====010010====100100100=1004位集成数值比较器的真值表级联输入：供扩展使用，一般接低位芯片的比较输出，即接低位芯片的FAB、FA=B、FAB。扩展：级联输入集成数值比较器74LS85(TTL)两片4位数值比较器74LS85ABA=BAB74LS85ABA=BABVCCA3B2A2A1B1A0B0B3ABA=BABFABFA=BFAB地12345678161514131211109748574LS851→8位数值比较器低位比较结果高位比较结果FABFA=BFABFABFA=BFABB7A7B6A6B5A5B4A4B3A3B2A2B1A1B0A0比较输出CMOS芯片设置AB只是为了电路对称，不起判断作用B7A7B6A6B5A5B4A4FABFA=BFABCC14585ABA=BABB3A3B2A2B1A1B0A0FABFA=BFABCC14585ABA=BAB集成数值比较器CC15485(CMOS)扩展：两片4位→8位VDDA3B3FABFABB0A0B1B2A2FA=BABABA=BA1VSS12345678161514131211109CC14585C6631低位比较结果高位比较结果1