flash memory testing

FlashMemoryTestingFlashMemoryTestingCheng-WenWu吳誠文LabforReliableComputingDept.ElectricalEngineeringNationalTsingHuaUniversityOutlineOutline•Introductiontoflashmemories•Flashmemoryfaultmodels−Disturbancefaults−Conventionalmemoryfaults−Otherflashmemoryfaults•Flashmemorytestalgorithms−March-basedtestalgorithms−Diagonaltestalgorithms•Flashmemoryfault-coverageanalysis−RAMSES-FT•FlashmemoryBIST•FlashmemoryBISD•Conclusionsm08flash5.05Cheng-WenWu,NTHU2FlashMemoryTestingFlashMemoryTesting•Testingnonvolatilememories:−MaskedROM---exhaustive;pseudorandom−PROM(OTP)&EPROM---dummyrow−EEPROM&flashmemory---dummyrow?•Testingflashmemorycoreishard−CustomizedcoreandI/O−Isolation(accessibility)−Reliabilityissues:disturbances,overprogram/erase,underprogram/erase,dataretention,cellendurance,etc.−Longprogram/erasetimem08flash5.05Cheng-WenWu,NTHU3ATypicalTestFlowofFlashMemoriesATypicalTestFlowofFlashMemoriesFabOutAssemblym08flash5.05Cheng-WenWu,NTHU4UVEraseCyclingTestWP2FT1Burn-inFT2WP1TestApproachesTestApproaches•Reasonablefaultmodelsforreliability-relateddefects•Efficienttestalgorithmstoreducetesttimeandincreasefaultcoverage•Built-inself-test(BIST)circuitforembeddedflashmemories−ReplaceorreducetherequirementofATE•“Built-inself-testandbuilt-inself-repairwillbeessentialtotestembeddedmemoriesandtomaintainproductionthroughputandyield”[ITRS2001]m08flash5.05Cheng-WenWu,NTHU5FlashMemoryOverviewFlashMemoryOverview•Flashmemorycanbeprogrammedanderasedelectrically−HastheadvantagesofEPROMandEEPROM•Astackedgatetransistorwithboththecontrolgate(CG)andfloatinggate(FG):GDSP-Sin+n+SourceDrainControlgateFloatinggatem08flash5.05Cheng-WenWu,NTHU6FlashMemoryProgram&EraseFlashMemoryProgram&Erase•Program(1to0):channelhot-electron(CHE)injectionorFowler-Nordheim(FN)electrontunneling•Erase(0to1):FNelectrontunneling•Bytheentirechiporlargeblocks(flasherasure)•Differentproductshavedifferentprogram/erasemechanismsProgram:CHEinjectionWrite0SubstrateControlGateFloatingGateDrainSourceGND+6V+12VSubstrateControlGateFloatingGateDrainSource+12VfloatingGNDErase:FN-tunnelingWrite1m08flash5.05Cheng-WenWu,NTHU7FlashMemoryReadFlashMemoryReadID(1)ID(0)IDVGS105V∆VTI-VCurvesVT0VT1SubstrateControlGateFloatingGateDrainSourceGND+1V+5VRead•TheEraseoperationismuchslowerthantheProgramoperation,whichinturnisslowerthantheReadoperationm08flash5.05Cheng-WenWu,NTHU8FlashMemoryCellTypesFlashMemoryCellTypes•Stacked-gateSplit-gateSelect-gate•Operations:Read,Program,Erase(FlashErase)−AsopposedtoReadandWriteinRAMm08flash5.05Cheng-WenWu,NTHU9NORNOR--ArrayStructureArrayStructurem08flash5.05Cheng-WenWu,NTHU10NANDNAND--ArrayStructureArrayStructureSelect(drain)WL1WL2WL3WL4WL16Select(source)BLim08flash5.05Cheng-WenWu,NTHU11DisturbanceExample(I)DisturbanceExample(I)WL0WL1WL2BL0BL1BL2BL310V0VProgramDisturbanceDrain-DisturbonProgrammedCellGate-DisturbonErasedCell6V0V0VSLSL0V0V6V10V0V10VProgrammingm08flash5.05Cheng-WenWu,NTHU12NOR-TypeCommonGround–Standard(StackedGate)DisturbanceExample(II)DisturbanceExample(II)WL0WL1WL2BL0BL1BL2BL35V0VReadDisturbanceSoft-ProgramonSelectedCell1VSLSLm08flash5.05Cheng-WenWu,NTHU13DisturbanceExample(III)DisturbanceExample(III)BL1ProgramDisturbanceProgram'1'WL0WL1WL2BL0SSLGSL2.8V2.8V18V3.3V3.3V0V10V2.8VBL218V0V0V10V0V3.3V0V0V10V0VProgram'0'Gate-DisturbonErasedCellGate-DisturbonProgrammedCellm08flash5.05Cheng-WenWu,NTHU14DisturbanceExample(IV)DisturbanceExample(IV)BL1ReadDisturbanceWL0WL1WL2BL0SSLGSL0V5V5V5V5VBL20V5V0.7V5V5VVth=-3VVth=+2V5V5Vsoft-programBL1EraseDisturbanceWL0WL1WL2BL0SSLGSL0VFloatingFloating0VBL20V0VFloating0V0VFloating21V21V21V21V21V21V21V21V21Vm08flash5.05Cheng-WenWu,NTHU15WordWord--LineProgramDisturbFault(WPDF)LineProgramDisturbFault(WPDF)m08flash5.05Cheng-WenWu,NTHU16V(H)V(H)V(L)V(L)V(Gd)Conditions:1.Victimcellinitialvalueisalogic‘1’2.Aggressor“1→0”(program)Victim“1→0”(program)ControlGateFloatingGateSourceDrainSubstrateGSDBm08flash5.05Cheng-WenWu,NTHU17WPDFWPDF0V5V0V0V12VBeprogrammed(victim)0V0V0VSource(0V)Addressedcell(aggressor)WordWord--LineEraseDisturbFault(WEDF)LineEraseDisturbFault(WEDF)Conditions:1.Victimcellinitialvalueisalogic‘0’2.Aggressor“1→0”(program)Victim“0→1”(erase)V(L)V(H)m08flash5.05Cheng-WenWu,NTHU18V(H)V(L)ControlGateFloatingGateSourceDrainSubstrateGSDBV(Gd)m08flash5.05Cheng-WenWu,NTHU19WEDFWEDF0V5V0V0V12VBeerased(victim)0V0V0VSource(0V)Addressedcell(aggressor)BitBit--LineProgramDisturbFault(BPDF)LineProgramDisturbFault(BPDF)Conditions:1.Victimcellinitialvalueisalogic‘1’2.Aggressor“1→0”(program)Victim“1→0”(program)V(H)•Duringprogramming,erasedcellsonunselectedrowsonabit-linethatisbeingprogrammedmayhaveafairlydeepdepletionregionformedunderthem•ElectronsenteringthisdepletionregioncanbeacceleratedbytheelectricfieldandinjectedovertheoxidepotentialbarriertoadjacentfloatinggatesV(H)V(L)V(Gd)m08flash5.05Cheng-WenWu,NTHU20m08flash5.05Cheng-WenWu,NTHU21BPDFBPDF0V5V0V0V0V12V0V0VSource(0V)Beprogrammed(victim)Addressedcell(aggressor)BitBit--LineEraseDisturbFault(BEDF)LineEraseDisturbFault(BEDF)Conditions:1.Victimcellinitialvalueisalogic‘0’2.Aggr