Flash Memory测试简介

Memory测试原理Unit1:IntroductiontoFlashTechnologyOverviewofMemoryDevicesCourseContentsTwoBasicMemoryCategoriesVolatileMemory易挥发存储器•Dataislostwhenpowerisremoved.NonvolatileMemory非易挥发存储器•Dataremainsevenwhenpowerisremoved.VolatileMemoryRAM–RandomAccessMemory•SRAM-StaticRAMiscommonlyusedas640Kbcachememoryincomputers.•DRAM-DynamicRAMiscommonlyusedforread-writememoryincomputers.NonvolatileMemoryROM–ReadOnlyMemory,ROM,areprogrammedinawaferfabandcannotbeerasedorreprogrammedinthefield.PROM–ProgrammableROMcanbereprogrammedinthefieldbyapplyinglargervoltageswithspecialequipment.EPROM–ErasablePROMcanbeerasedwithUVlightandreprogrammedwithspecialequipment.EEPROM–ElectricallyErasablePROMcanbeerasedwithhighervoltagesandreprogrammedinthefield.NonvolatileMemoryNVRAM–NonvolatileRAM(Flash)issmallerthanPROMs,lessexpensive,andeasiertoprogramanderase.Magnetic–Magneticdiskandtapecanbeeasilyprogrammedanderasedbyuser,butareslowerthanFlash.Optical–CDROMcanbeeasilyprogrammedbyuserbutisslowerthanFlash.BenefitsofFlashMemoryChipsSmallerthanEPROMSandEEPROMSRequiresonlyonetransistorandastoragecapacitorperbitcell.Canbequicklyandeasilyerasedandreprogrammedwithouttheneedofspecialequipment.Excellentforuseincellphones,pagers,calculators,portabledigitaldevices,automotive,flightdatarecorders,andpersonalcomputers.SimpleROMMemoryArrayData“0”CellNogatemetalcontactData“1”CellGateisconnectedSDGWordlineBitlineSDGWordlineBitlineSenseAmps/BuffersWordlineBitlineBitlineBitlineCapacitorCurrent-sensinglineSimpleDRAMMemoryArrayCapacitorcharged,Nocurrent,“0”Capacitoruncharged,Currentflow,“1”•ActivateRowtoread–Ifcapacitorwascharged,nocurrentflowsonbitline–Ifcapacitornotcharged,currentflowsonbitline–BufferoncolumnsenseampsSimpleEPROMMemoryArrayWordlineBitlineBitlineBitlineSenseAmps/BuffersAsecond“floatinggate”servesasthestorageelementinanEPROM.FloatinggateFloatingGateSourceGateDrainFloatingGate(electricallyisolated)isthestorageelement•charged=“programmed”•neutral=“erased”BasicFlashMemoryCellFlashCellStructure-SimilartoEPROM,exceptElectrically-erasablen+Sourcen+Drainp+SubstrateControlGateFloatingGateDielectric(oxide)Dielectric(ONO)Polysilicon(doped)FlashCellOperation-ProgramModeChannelHot-ElectronInjectionp+Substraten+n+ControlGateFloatingGateGNDVG=+9.3VVD=+4.5VE-fieldE-fieldElectricfieldsformduetovoltagesSourceDrainFlashCellOperation-ProgramModeChannelHot-electronInjectionGNDVG=+9.3VVD=+4.5Vn+n+SourceDrainp+SubstrateControlGatee-e-e-FloatingGatee-e-e-e-e-e-e-e-e-e-e-e-e-e-e-e-FlashCellOperation-ProgramModeIDSConduction&FloatingGateCharge(Q)p+SubstrateGNDVG=+9.3VVD=+4.5Vn+n+ControlGateFloatingGateIDS=0QSourceDrainLogicstate“0”FlashCellOperation-EraseModeNegativeGate---F－NTunnelingp+SubstrateFloatVG=-9.3VVD=Floatn+n+ControlGateFloatingGateQe-e-e-e-e-e-e-e-e-e-e-e-e-e-e-e-e-e-e-e-FloatingGateElectrically-erasablechargefromgateSourceDrainLogicstate“1”FlashMemoryBitThresholdVoltagesIDSVGS56012347FlashArrayArchitecture(schematic)3.GNDlines(source)1.Bitcellformation2.Wordlines(gate)4.Bitlines(drain)Corememory(core)FlashArrayCellAddressingRowDecoderColumnDecoderAddressSelectedbitline(L)SourceSwitchSelectedwordline(H)GNDSelectedcellBasicMemoryDeviceInternalArchitecture1111000000000000A0A1A2A3A4A5A6A7Memorycell•MemoryCellblock:每个CELL存储data（1/0）•AddressDecoderCircuitry：地址译码以(A0～)来选择不同的memorycellorblock进行读写操作。•Input/OutputI/O)circuitry：是memoryCell和外界的输入输出接口，将data在(D0～)与Cell间传输。•ControlCircuitry：控制memoryCell工作状态的电路CE/OE/WE(ChipEnable/OutputEnable/WriteEnable)Unit2:DeviceTesting•DCparametrictest•ACparametrictest•FunctionalTestDCparametrictestISVM：ForcecurrentmessagevoltageVSIM:ForcevoltagemessagecurrentDCParametricTests：测试AddressDecoder和I/O回路中Input/OutputBuffer的DC特性。在DCTest中一般使用VSIM及ISVM的方法。•DCContactCheck开路/短路测试OPEN/SHORT•Input/OutputLeakageCheck输入/输出漏电流测试INLEAK/OUTLEAK•CMOSAutomaticSleepCMOS自动睡眠模式电流测试CMOSASM•StandbyCurrentCheckDevice不工作时待机电流测试ICCSB•OutputDriveVoltage&CurrentDevice电压及电流驱动能力测试VOH/VOLDCParametricTest•OPEN/SHORTest•INLEAK/OUTLEAKTest•CMOSASM•ICCSBTest•VOH/VOLTestOpenTestPurpose:测量devicepins是否correctlytoDUT/Testerchannel测量Device内部管脚是否有开路。•Groundallpins(includingVCC);•SetVoltageClamp3.0volts;•UsingPMU,forcepositiveornegativecurrent,onepinatatime;•Measureresultantvoltage;•Failstest(open)iftheabsolutevoltagemeasuredisgreaterthan1.5V;TestMethodShortTestPurpose:测试thedevicepins是否有短路TestMethod:Vss(0V)Vcc(3.3V)In(0.3V)NocurrentthroughtwoprotectdiodeIfshortI100uaIVss(0V)Vcc(3.3V)In(0.3V)NocurrentthroughtwoprotectdiodeNormalI100uaI•Groundallpins(includingVCC);•SetVoltageClamp3.0volts;•UsingPMU,forcepositiveornegativeVoltage,onepinatatime;•Measureresultantcurrent;•Failstest(short)iftheabsolutevoltagemeasuredislessthan0.2V.DefinitionIIL--InputleakagelowThecurrentinaninputwhenitisforcedlowvoltage.IIH--InputleakagehighThecurrentinaninputwhenitisforcedhighvoltage.Whytest?TheIILtestmeasurestheresistancefromaninputpintoVCC,IIHtestmeasurestheresistancefromaninputpintoVSS.Thetestinsuresthattheinputbuffersofferahighresistancewhenapply0vandVCC.InputLeakageTest(INLEAK)In