数字集成电路习题答案

习题答案简述CMOS工艺流程1.已知电路如图1所示，使用一阶二极管模型，即求解DIVVDon7.0习题1电路图)(275.05.27.0*2)40004000(5.22)(21mAIIVIRRDDDonD解：根据VGS和VDS确定其处于线性、饱和还是截止状态，并求的值。1/25.1,5.0,1.0,4.0,/30:5.2,5.2,06.0,43.0,/115:102'102'LWVVVVVVVVAkPMOSVVVVVVVVAkNMOSDSGSTnDSGSTn2.已知DIAVVVVLWkIVVnmosVVVVnmosDSGTnDGTDSTGSGT3.283)5.206.01)(207.207.2(115)1)(2)((07.2,07.243.05.2:)1(222minmin'min0处于饱和区解：AVVVVLWkIvVpmosVVVVpmosDSGTnDDSTGSGT169.0)25.11.01(1.0)05.01.0(30)1)(2)((0.1,1.04.05.0:)2(2minmin'min0处于饱和区3.简述MOS管的电容分布，及其模型521442131221111)()()(CRRCRRRCRCRRCRDCLK552142131221112)()()(CRRRCRRCRCRRCRDCLK514133121113)(CRCRCRRCRCRDCLKikNkkDiRC1（a）RCCRRRCRRCRCRRCRDCLK9)()()(552142131221112RRCRRCRCRCRRCRCRDCLK4)5()(33514133121113RCCRRCRRRCRCRRCRDCLK9)()()(521442131221111（b）)(2525.05.2504373755.4377505.625.1875.1875.62250*)100015.025.0(500*)5.025.0(250*)15.025.0(1000*)5.025.0(250*25.0250*)5.025.0(750*25.0250*25.0)()()()()(88631731663153141331211181nsCRRRRCRRCRRRCRRCRCRRCRCRRCBkkkDB1.假设设计一个通用0.25mCMOS工艺的反相器，其中PMOS晶体管的最小尺寸为(W=0.75m，L=0.25m，即W/L=0.75/0.25),NMOS晶体管的最小尺寸为(W=0.375m，L=0.25m，即W/L=0.375/0.25)求出g,VIL,VIH,NML,NMHVT0(V)(V0.5)VDSAT(V)k’(A/V2)(V-1)NMOS0.430.40.63115×10-60.06PMOS-0.4-0.4-1-30×10-6-0.11.假设设计一个通用0.25mCMOS工艺的反相器，其中PMOS晶体管的最小尺寸为(W=0.75m，L=0.25m，即W/L=0.75/0.25),NMOS晶体管的最小尺寸为(W=0.375m，L=0.25m，即W/L=0.375/0.25)求出g,VIL,VIH,NML,NMHVT0(V)(V0.5)VDSAT(V)k’(A/V2)(V-1)NMOS0.430.40.63115×10-60.06PMOS-0.4-0.4-1-30×10-6-0.1AVVVVVLWkVIDSnDSATnDSATnTnGSnnMD662'1059)25.106.01)(2/63.043.025.1(63.0101155.1)1](2)[()(05.211.006.00.11030363.0101155.110591)(1666pnDSATppDSATnnMDVkVkVIgVgVVVVMDDMIL19.105.2125.15.225.1VgVVVMMIH31.105.2125.125.119.119.131.15.2ILLIHDDHVNMVVNV2.如下图所示，由NMOS组成的反相器，输出电容CL=3pF,W/L=1.5um/0.5um,求tpHL,tpLH和tpnstnspFkCRtnspFkCRtpLLpLHLeqnpHL11.82225.15597.825.15537569.02ln97.8331369.02ln注：NMOS和PMOS的等效电阻可由表3.3查出1.写出下图的逻辑函数式GFCDEABX)(2、写出下图的逻辑函数式，确定电路中晶体管的尺寸，使它的tpLH和tpHL与具有以下尺寸的反相器近似相等：NMOS为W/L=4,PMOS:W/L=8QQ′习题1：一上升沿触发的D触发器，设初态为1，试在给定CP、D下，画出Q和Q′波形。CPD