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IC制造流程简介ANDY相关定义半导体是指导电能力介于导体和非导体之间的材料,其指四价硅中添加三价或五价化学元素而形成的电子元件,它有方向性可以用来制造逻辑线路使电路具有处理资讯的功能。半导体的传导率可由搀杂物的浓度来控制:搀杂物的浓度越高,半导体的电阻系数就越底。P型半导体中的多数载体是电洞。硼是P型的掺杂物。N型半导体的多数载体是电子。磷,砷,锑是N型的搀杂物。相关定义集成电路是指把特定电路所需的各种电子元件及线路缩小并制作在大小仅及2CM平方或更小的面积上的一种电子产品。相关定义集成电路主要种类有两种:逻辑LOGIC及记忆体MEMORY。前者主要执行逻辑的运算如电脑的微处理器后者则如只读器READONLY及随机处理器RANDOMACCESSMEMORY等。集成电路的生产主要分三个阶段:硅镜片WAFER的制造,集成电路的制造及集成电路的包装PACKAGEWaferStartCMPOxidationPVD,CVDWaferCleaningPhotolithographyEtch(DryorWet)AnnealingImplantationTheOutlineWaferStartCMPWaferCleaning製程TheIntroductiontoTheManufacturingProcessofVLSIANDY晶圓(Wafer)晶棒成長切片(Slicing)研磨(Lapping)清洗(Cleaning)拋光(Polishing)檢查(Inspection)MeltSeedGraphiteCrucibleGrowingCrystalNoncontaminatingLiner(a)Seedbeinglowereddowntomelt(b)Seeddippedinmeltfreezingonseedjustbeginning(b)PartiallygrowncrystalTheCzochralskiMethod-1(a)As-growncrystal(b)Grindcrystaltoremoveundulationsandsawtoremoveportionsinresistiverange(c)Sawintoslices(withorientingflatsgroundbeforesawing)(d)Roundedgesofslicebygrinding(e)PolishsliceCrystaltoWafe微影(Photolithography)原理:在晶片表面上覆上一層感光材料,來自光源的平行光透過光罩的圖形,使得晶片表面的感光材料進行選擇性的感光。感光材料:正片-經過顯影(Development),材料所獲得的圖案與光罩上相同稱為正片。負片-如果彼此成互補的關係稱負片WaferWaferContactPrinttoexposeresistWaferResistApplyresistafterpriming(spinner)ResistOxideLightsourceProjectionprinttoexposeresistorWaferResistOxideProjectionlensMaskCondenserlensNextPagePhotolithographyProcess-1MaskContinueWaferWaferWaferDevelopresistEtchoxideStripresistDevelopedresistshowingpatternEtchtomatchresistpatternResistremovedPhotolithographyProcess-2Doping:Togettheextrinsicsemiconductorbyaddingdonorsoracceptors,whichmaycausetheimpurityenergylevel.Theactionthataddingparticularimpuritiesintothesemiconductoriscalled“doping”andtheimpuritythataddediscalledthe“dopant”.IntroductiontoDopingDopingmethods:1.Diffusion2.IonImplantationPre-deposition:Toputtheimpuritiesonthewafersurface.Generallyuseddopantresourcefurnacedesign:CarriergasHeaterQuartztubeSoliddopantsourcefurnaceO2LiquiddopantsourceCarriergasGasdopantsourceValveO2(a)(c)(b)DiffusionProcess-1SoliddopantsourceDrive-in:ToimplantthedopantintothewaferbythethermalprocessQuartztubeQuartztubeHeaterWaferGasoutReactionroomGasinGasoutWaferQuartzboats3-ZoneheatingelementDopantsandgasinProfilingTc(Inthetube)HorizontalTypeVerticalTypeDiffusionPrecess-21.Thedefinition:Amanufacturingprocessthatcanuniformlyimplantstheionsintothewaferinthespecifieddepthandconsistencebyselectingandacceleratingions.2.Thepurpose:Tochangetheresistancevalueofthesemiconductorbyimplantingthedopant.3.Energyrange(8yearsago)(1)Generalprocess:10KeV-180KeV(0.35m)(100KeVfor0.18mnow)(2)Advancedprocess:10KeV-3MeV(0.5m)(3)R&Dprocess:0.2KeV-5KeVIntroductiontoIonImplantationDopantSourceIonSourceMassAnalysisAcceleratorScannerElectronShowerIonImplanterExtractorFaradyCapParameters•Dopingelementsselection•Scanninguniformitycontrol•Temperaturecontrol•ConcentrationcontrolFactors•Theselectionoftheionresource•Thedesignofthemassanalyzer•Scanningsystem•Vacuumcontrol•Precisewaferpositioncontrol•Preciseandstableelectricpowersupplier•Themeasurementoftheioncurrent(FaradyCup)DopingParametersPhysicalVaporDepositionDCMetalTargetGasInToTheVacuumPumpWaferPlateCollimatorChemicalVaporDeposition(a)Reagentsdiffusethroughtheinterfaceboundarylayer(b)Adsorbedontothewafersurface(c)Depositionreactionhappens(d)Byproductsdiffusethroughtheinterfaceboundarylayer(e)Reagents&byproductspassawayHeatSource(a)(d)(b)(c)(e)ReactionMainStreamInterfaceBoundaryLayerWafersurfaceVacuumSystem(1)ThermalOxidationThegrowthtemperatureisabove9000C.HighqualitySiO2.(2)LowPressureCVD(LPCVD)Thegrowthtemperatureisaround4000Cto7500C.Betterstepcoverageability.(3)PlasmaEnhancedCVD(PECVD)Thegrowthtemperatureisunder4000C.InthecaseoftheAldepositionandnon-thermalprocess.SolutionstoDepositionDownForcewaferWaferCarrierCarrierFilmSlurryCarrierWaferInterconnectsCompositePadTablePolishingPadPolishingtablepCMPSystemSchematicCarrierFilmcMajorParametersInCMPSiO2CMP:•DownForce•RotatingSpeed(p)•TypeofThePadMetalandSiCMP:•pHMeasurement*Thelowertheforce-speedratiothebettertheplanaritySlurryParticle(0.1~2.0um)•Silica(Colloidal)•Alumina(Dispersed)Liquor(ContainssomeoxidantandorganicreagentsinthecaseofmetalCMP)•KOH•NH4OHWaferCleaningPurpose:ToremovetheremainsandimpuritiesMethods:•BrushCleaning•SprayCleaning•UltrasonicCleaningPhotoresistSiO2SiSubstratePhotoMaskPositiveResistNegativeResistEtchingIntro-1NextPagePositiveResistNegativeResistEtchingIntro-2ContinueEtchingMethods•WetEtching(Isotropic)RelativelysimpleprocessHighthroughputLowquality•DryEtching(Anisotropic)Highquality(duetotheexcellentpatterntransferability)WorseselectivityWetEtchingSubstrateThinFilmSolutionBoundaryLayerReagentResultantReactionPhotoResist(a)IsotropicEtching:A=0(Erh=Erv)(b)AnisotropicEtching:A=1(Erh=0)Isotropic&AnisotropicQuartzdomeSiliconwaferSiliconcarbidecoatedgraphiteRFCoilGasinGasexitSiliconcarbidesusceptorGasexitSiliconwafersRFinductionheatingcoilDryEtchingSystem-1(a)SputteringEtching(b)PlasmaEtching(c)ReactiveIonEtchingIonReactiveIonVolatileProductVolatile
本文标题:IC制造流程简介
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