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RTL8201CLRTL8201CL-LFRTL8201CL-VDRTL8201CL-VD-LFSINGLE-CHIP/SINGLE-PORT10/100MFASTETHERNETPHYCEIVERDATASHEETRev.1.2404November2005TrackID:JATR-1076-21RealtekSemiconductorCorp.No.2,InnovationRoadII,HsinchuSciencePark,Hsinchu300,TaiwanTel.:+886-3-578-0211.Fax:+886-3-557-6047:JATR-1076-21Rev.1.24COPYRIGHT©2005RealtekSemiconductorCorp.Allrightsreserved.Nopartofthisdocumentmaybereproduced,transmitted,transcribed,storedinaretrievalsystem,ortranslatedintoanylanguageinanyformorbyanymeanswithoutthewrittenpermissionofRealtekSemiconductorCorp.DISCLAIMERRealtekprovidesthisdocument“asis”,withoutwarrantyofanykind,neitherexpressednorimplied,including,butnotlimitedto,theparticularpurpose.Realtekmaymakeimprovementsand/orchangesinthisdocumentorintheproductdescribedinthisdocumentatanytime.Thisdocumentcouldincludetechnicalinaccuraciesortypographicalerrors.TRADEMARKSRealtekisatrademarkofRealtekSemiconductorCorporation.Othernamesmentionedinthisdocumentaretrademarks/registeredtrademarksoftheirrespectiveowners.USINGTHISDOCUMENTThisdocumentisintendedforthesoftwareengineer’sreferenceandprovidesdetailedprogramminginformation.Thougheveryefforthasbeenmadetoensurethatthisdocumentiscurrentandaccurate,moreinformationmayhavebecomeavailablesubsequenttotheproductionofthisguide.Inthatevent,pleasecontactyourRealtekrepresentativeforadditionalinformationthatmayhelpinthedevelopmentprocess.RTL8201CLDatasheetSingle-Chip/Port10/100FastEthernetPHYceiveriiiTrackID:JATR-1076-21Rev.1.24REVISIONHISTORYRevisionReleaseDateSummary1.02003/06/09Firstrelease.1.12003/09/26Minorcosmeticchanges.ModifyLEDPinbehavior.1.22004/01/20AddLEDmulti-modedefinition(7.5LEDandPHYAddressConfiguration,page19).AddPowerdissipationinfo(Table31).Bit0:8defaultsettingchangedto0(Table9).Bit0:13defaultsettingchangedto0(Table9).Bit5:7defaultsettingchangedto0(Table14).Bit17:5defaultsettingchangedto1(Table17).Bit25:0defaultsettingchangedto0(Table20).Bit25:1defaultsettingchangedto0(Table20).Bit25:11~7defaultsettingchangedto00001(Table20).1.212004/10/12Packageadditions.Seesection10,OrderingInformation,page33.1.222005/04/11CorrectiontoTable18,Register18RX_ERCounter(REC),page13.CorrectiontoTable39,TransformerCharacteristics,page30.Addedlead(Pb)-freepackageidentificationinformationonpage3andonpage33.1.232005/07/29Correctederrorin7.8.310Base-TTX/RX,page21(10Base-TTransmitFunction_clockat25MHz=clockat2.5MHz).CorrectionstoTable32,InputVoltage:Vcc,page23.Vcc_TTLVoh_Minimum0.9*Vcc=Minimum0.65*VccVcc_TTLVol_Maximum0.1*Vcc=Maximum0.3*VccVcc_TTLIoz_Minimum-10uA=Minimum-110uAVcc_Iin_Minimum-1.0uA=Minimum-110uAVcc_Iin_Maximum1.0uA=Maximum100uA1.242005/11/04RevisedTable1,page4(pins2,3,4,5,6,and25).CorrectedTable17,page12(bits17:6and17:5).CorrectedTable18,page13(mode).RevisedTable32,page23(IIN,IPL,IPH).RevisedTable33,page24(t8).RevisedTable34,page25(t6,t7,t9).RTL8201CLDatasheetSingle-Chip/Port10/100FastEthernetPHYceiverivTrackID:JATR-1076-21Rev.1.24TableofContents1.GENERALDESCRIPTION................................................................................................................................................12.FEATURES...........................................................................................................................................................................13.BLOCKDIAGRAM.............................................................................................................................................................24.PINASSIGNMENTS...........................................................................................................................................................34.1.LEAD(PB)-FREEPACKAGEIDENTIFICATION................................................................................................................35.PINDESCRIPTIONS..........................................................................................................................................................45.1.MIIINTERFACE............................................................................................................................................................45.2.SNI(SERIALNETWORKINTERFACE)10MBPSONLY....................................................................................................55.3.CLOCKINTERFACE.......................................................................................................................................................55.4.10MBPS/100MBPSNETWORKINTERFACE....................................................................................................................65.5.DEVICECONFIGURATIONINTERFACE...........................................................................................................................65.6.LEDINTERFACE/PHYADDRESSCONFIGURATION.......................................................................................................65.7.POWERANDGROUNDPINS..
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