您好,欢迎访问三七文档
当前位置:首页 > 电子/通信 > 电子设计/PCB > EM-LPC1768开发板原理图
5544332211DDCCBBAAXTAL1XTAL2RTCX1RTCX2XTAL1XTAL2RTCX1RTCX2GNDGNDVDDIOGNDVDDREGGNDGNDVBATGNDGND+3V3AP2.0{2,3,9}P2.1{2,3,9}P2.2{2,3,5,9}P2.3{2,3,5,9}P2.4{2,3,5,9}P2.5{2,3,5,9}P2.6{2,3,5,9}P2.7{2,5,9}P2.8{2,5,9}P2.9{2,8,9}P2.10{2,3,9}P0.0{2,5,9}P0.1{2,5,9}P0.2{2,3,9}P0.3{2,3,9}P0.6{2,6,9}P0.7{2,6,9}P0.8{2,6,9}P0.9{2,6,9}P0.10{2,7,9}P0.11{2,7,9}P0.15{2,6,9}P0.16{2,6,9}P0.17{2,6,9}P0.18{2,6,9}P0.22{2,7,9}P0.25{2,5,9}P0.26{2,9}P0.29{2,7,9}P0.30{2,7,9}P1.0{2,4,9}P1.1{2,4,9}P1.4{2,4,9}P1.8{2,4,9}P1.9{2,4,9}P1.10{2,4,9}P1.14{2,4,9}P1.15{2,4,9}P1.18{2,8,9}P1.19{2,7,9}P1.20{2,6,9}P1.22{2,7,9}P1.23{2,6,9}P1.24{2,6,9}P1.25{2,6,9}P1.26{2,6,9}P1.28{2,3,9}P1.29{2,3,9}P1.30{2,8,9}P1.31{2,3,9}P4.28{2,6,9}P4.29{2,6,9}nRESET{2,3,5}TDI{2,5}TMS{2,5}TCK{2,5}nTRST{2,5}RSTOUT{2,4,6,7}TDO{2,5}XTALIN{2}XTALOUT{2}RTCXIN{2}RTCXOUT{2}Title:Size:DocumentNumber:Rev:Date:Sheet:ofDrawBy::Size:DocumentNumber:Rev:Date:Sheet:ofDrawBy::Size:DocumentNumber:Rev:Date:Sheet:ofDrawBy:[0]/RD1/TXD3/SDA137P0[1]/TD1/RXD3/SCL138P0[2]/TXD0/AD0[7]79P0[3]/RXD0/AD0[6]80P0[6]/I2SRX_SDA/SSEL1/MAT2[0]64P0[9]/I2STX_SDA/MOSI1/MAT2[3]61P0[8]/I2STX_WS/MISO1/MAT2[2]62P0[7]/I2STX_CLK/SCK1/MAT2[1]63P0[10]/TXD2/SDA2/MAT3[0]39P0[11]/RXD2/SCL2/MAT3[1]40P0[15]/TXD1/SCK0/SCK47P0[16]/RXD1/SSEL0/SSEL48P0[17]/CTS1/MISO0/MISO46P0[22]/RTS1/TD144P0[18]/DCD1/MOSI0/MOSI45P0[26]/AD0[3]/AOUT/RXD36P0[25]/AD0[2]/I2SRX_SDA/TXD37P0[29]/USB_D+22P0[30]/USB_D-23P1[15]/ENET_REF_CLK69P1[14]/ENET_RX_ER70P1[10]/ENET_RXD171P1[9]/ENET_RXD072P1[8]/ENET_CRS73P1[4]/ENET_TX_EN74P1[1]/ENET_TXD175P1[0]/ENET_TXD076P1[18]/USB_UP_LED/PWM1[1]/CAP1[0]25P1[19]/MC0A/USB_PPWR/CAP1[1]26P1[20]/MCFB0/PWM1[2]/SCK027P1[22]/MC0B/USB_PWRD/MAT1[0]28P1[23]/MCFB1/PWM1[4]/MISO029P1[24]/MCFB2/PWM1[5]/MOSI030P1[25]/MC1A/CLKOUT/MAT1[1]31P1[26]/MC1B/PWM1[6]/CAP0[0]32P1[28]/MC2A/PCAP1[0]/MAT0[0]35P1[29]/MC2B/PCAP1[1]/MAT0[1]36P1[31]/SCK1/AD0[5]17P1[30]/VBUS/AD0[4]18P2[7]/RD2/RTS151P2[6]/PCAP1[0]/RI1/TRACECLK52P2[5]/PWM1[6]/DTR1/TRACEDATA[0]53P2[4]/PWM1[5]/DSR1/TRACEDATA[1]54P2[3]/PWM1[4]/DCD1/TRACEDATA[2]55P2[2]/PWM1[3]/CTS1/TRACEDATA[3]58P2[1]/PWM1[2]/RXD159P2[0]/PWM1[1]/TXD160P2[9]/USB_CONNECT/RXD2/ENET_MDIO49P2[8]/TD2/TXD2/ENET_MDC50P2[10]/EINT0/NMI41P4[28]/RX_MCLK/MAT2[0]/TXD365P4[29]/TX_MCLK/MAT2[1]/RXD368TDO/SWO1TDI2TMS/SWDIO3TRST4TCK/SWDCLK5RSTOUT11RESET14XTAL119XTAL220RTCX113RTCX215VSS_024VSS_133VSS_243VSS_357VSS_466VSS_578VSSA9VDD(3V3)_021VDD(3V3)_142VDD(3V3)_256VDD(3V3)_377VDD(REG)(3V3)_034VDD(REG)(3V3)_167VDDA8VREFP10VREFN12VBAT16C1010nFC1010nFC7100nFC7100nFC1100nFC1100nFC2100nFC2100nFY112.000MHzY112.000MHzC1520pFC1520pFC910nFC910nFC6100nFC6100nFC12100nFC12100nFY232.768KHzY232.768KHz123C1420pFC1420pF5544332211DDCCBBAAGNDVDDREGGNDGNDVBATGNDGND+3V3GNDVBATVDDIO+3V3AP0.0{1,5,9}P0.1{1,5,9}P0.2{1,3,9}P0.3{1,3,9}P0.4{9}P0.5{6,9}P0.6{1,6,9}P0.7{1,6,9}P0.8{1,6,9}P0.9{1,6,9}P0.10{1,7,9}P0.11{1,7,9}P0.15{1,6,9}P0.16{1,6,9}P0.17{1,6,9}P0.18{1,6,9}P0.19{9}P0.20{9}P0.21{9}P0.22{1,7,9}P0.23{9}P0.24{9}P0.25{1,5,9}P0.26{1,9}P0.27{7,9}P0.28{7,9}P0.29{1,7,9}P0.30{1,7,9}P1.0{1,4,9}P1.1{1,4,9}P1.4{1,4,9}P1.8{1,4,9}P1.9{1,4,9}P1.10{1,4,9}P1.14{1,4,9}P1.15{1,4,9}P1.16{4,9}P1.17{4,9}P1.18{1,8,9}P1.19{1,7,9}P1.20{1,6,9}P1.21{9}P1.22{1,7,9}P1.23{1,6,9}P1.24{1,6,9}P1.26{1,6,9}P1.25{1,6,9}P1.27{7,9}P1.28{1,3,9}P1.29{1,3,9}P1.30{1,8,9}P1.31{1,3,9}P2.0{1,3,9}P3.25{9}P3.26{9}P4.28{1,6,9}P4.29{1,6,9}RSTOUT{1,4,6,7}nRESET{1,3,5}TDI{1,5}TMS{1,5}TCK{1,5}RTCK{5}nTRST{1,5}TDO{1,5}P2.1{1,3,9}P2.2{1,3,5,9}P2.3{1,3,5,9}P2.4{1,3,5,9}P2.5{1,3,5,9}P2.6{1,3,5,9}P2.7{1,5,9}P2.8{1,5,9}P2.9{1,8,9}P2.10{1,3,9}P2.11{9}P2.12{9}P2.13{9}XTALIN{1}XTALOUT{1}RTCXIN{1}RTCXOUT{1}Title:Size:DocumentNumber:Rev:Date:Sheet:ofDrawBy::Size:DocumentNumber:Rev:Date:Sheet:ofDrawBy::Size:DocumentNumber:Rev:Date:Sheet:ofDrawBy:[0]/RD1/TXD3/SDA146P0[1]/TD1/RXD3/SCL147P0[2]/TXD0/AD0[7]98P0[3]/RXD0/AD0[6]99P0[4]/I2SRX_CLK/RD2/CAP2[0]81P0[5]/I2SRX_WS/TD2/CAP2[1]80P0[9]/I2STX_SDA/MOSI1/MAT2[3]76P0[8]/I2STX_WS/MISO1/MAT2[2]77P0[7]/P0[7]/SCK1/MAT2[1]78P0[6]/I2SRX_SDA/SSEL1/MAT2[0]79P0[10]/TXD2/SDA2/MAT3[0]48P0[11]/RXD2/SCL2/MAT3[1]49P0[15]/TXD1/SCK0/SCK62P0[16]/RXD1/SSEL0/SSEL63P0[22]/RTS1/TD156P0[21]/RI1/RD157P0[20]/DTR1/SCL158P0[19]/DSR1/SDA159P0[26]/AD0[3]/AOUT/RXD36P0[25]/AD0[2]/I2SRX_SDA/TXD37P0[24]/AD0[1]/I2SRX_WS/CAP3[1]8P0[23]/AD0[0]/I2SRX_CLK/CAP3[0]9P0[28]/SCL0/USB_SCL24P0[27]/SDA0/USB_SDA25P0[29]/USB_D+29P0[30]/USB_D-30P1[17]/ENET_MDIO86P1
本文标题:EM-LPC1768开发板原理图
链接地址:https://www.777doc.com/doc-4243280 .html