流水线技术在FPGA设计中的应用

16120043J.NORTHCHINAUNIV.OFTECH.Vol.16No.1Mar.2004FPGA(,100041,)FPGA16,16FIR,,.,FPGA,FIRTN713.7,DSPDSP,,.3,DSP.FPGA,,,.,FPGA,FPGA16FIR.1,,.1,4:I1,I2,I3I4,T,44T,4,4,4,T,T,4,,.I1I2I3I4I1I2I3I4I1I2I3I4I1I2I3I41,,,FIRFFT.:20031104:,,:.2FPGA(LE),AlteraFLEX10K10576LE,8LE(LAB),72LABI/O(FastTrack),1.FPGA,,TTL,,tpt,.FPGA,(),,,.FPGA.,.[1]3FPGA(DSP),.DSP,FIR,FIR:y(n)=N-1i=0a3ix(n-i)NFIR,ai,x(n)y(n).,FIR,DSP.,,DSP.3.182,4.VHDL,,.,,.283.2FPGA,FPGAEAB(embededarrayblock:).EAB,,.AlteraFLEX10KEABRAMROMFIFORAM.EABROM,(.mif.hex),,ROM,,,.FPGAEAB,FLEX10K103EAB,,.,,.8Y=ab,2:a=ah24+al,Y=(ah24+al)b=ah24b+alb,248,,2241216,,,.361:FPGAAlteraFPGA,EABROM,ROM,,,,1/2.3.3FIRFIR(DSP).NFIR:H(Z)=N-1n=0h(n)Z-nNFIR:y(n)=N-1m=0h(m)x(n-m)N,h(m),x(n)y(n).FIR,,x(n).,,FIR3,,.3FIR3.4MAX+PLUS,816FIREPF10K10LC84-4EPF10K30ETC144-1,MAX+PLUSTimingAnalysis,Anal2ysisRegisteredPerformance,1.1EPF10K10LC84-4(MHz)(ns)EPF10K30ETC144-1(MHz)(ns)897.510.26515.481506.61009.9839.325.426.238.1897.910.265.315.316FIR254037.626.64,FPGA,,FIR,FIR,FPGAFIR.1.CPLD.:,19992KwentusAY,HungHT,WilssonJrAN.Anarchitectureforhigh2performance/small2areamultipliersforuseindig2italfilteringapplication.IEEEJSolid2StateCircuits,1994,29(2):1171213MarkCummings,shinichiroHaruyama.FPGAintheSoft2wareRadio.IEEEConmmunicationsMagazine,1999.2(70)46165..,2001,113(23):28306YagerRR.Multi2criteriadecisionwithsoftinformation:anapplicationoffuzzysetandpossibilitytheory(),(),FuzzyMath,1982,2:2128;3:716AModelofMulti2criteriaConsumerScoringUsingFuzzySynthesisEvaluationMethodChenXinhuiDingJuanjuanWuFusuo(CollegeofEcon.&Manage.,NorthChinaUniv.ofTech.,Beijing100041)AbstractBasedonthefuzzyprocessingofconsumercreditinformation,takingsatisfactiondegreeastheevaluationcriterion,andwiththeaidoffuzzyinferencerulestosimulatethethinkinganddecision2makingpro2cessesofthehumanbrain,anindividualcreditgradeevaluationmodeliscreated,which,inturn,providesanewsolutiontoindividualconsumerscoring.KeyWordsmulti2criteria;fuzzyset;creditscoring;satisfactiondegree(64)ApplicationofPipelineTechnologyinFPGADesignGuoShujunWangYuhua(CollegeofInformationEngineering,NorthChinaUniv.ofTech.,100041,Beijing,China)AbstractThispaperdiscussesthemethodsofthedesignofthepipelineadderandmultiplicatorandthe162steplowpassFIRfilterinFPGA.Takingthedesignofthe162steplow2passFIRfilterasanexample,theau2thorsmakeacomparisonamongtheperformancesoftheadder,multiplicatorandfilter,theworkprovesthatthepipelinemethodimprovesthecalculatingspeedsatisfactorily.KeyWordspipelinetechnology;FPGA;FIRfilter0716