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10/100M以太网收发器带隙基准源设计摘要:带隙基准源是当代模拟集成电路极为重要的组成部分,广泛应用于收发器、数模转换器、模数转换器、数模混合集成电路、线性稳压器、高精度比较器、随机存取存储器、闪存等,是其中不可或缺的重要单元,其性能直接影响到整个系统的性能。本文首先介绍了CMOS带隙基准源的研究现状和选题背景及意义。分别采用集成芯片MC1403和TL431设计了基于基本电子电路的带隙基准,在模拟仿真软件Multisim13.0下仿真原理图,输出电压达到1.25V±1%。设计了基于标准CMOS工艺的带隙基准电压源,包括核心电路、运算放大器和偏置电路的设计。在5V电源电压下,基于中芯国际0.35μmCMOS2P3M工艺,利用Spectre仿真器对带隙基准电压源电路进行模拟仿真,最终得到电源电压抑制比(PSRR)大于70dB,温度系数(TC)小于10ppm/°C,基准输出电压1.25V±0.3%。最后利用CadenceVirtuoso设计工具,对电路进行版图设计,并通过验证。关键词:带隙基准;版图;温度系数;电源电压抑制比IIDesignof10/100MEthernettransceiverbandgapreferencesourceAbstract:Bandgapreferencesourceareanessentialpartofmodernanalogintegratedcircuit,andwidelyusedinthetransceiver,DAC,ADC,SOC,LDO,precisioncomparator,RAM,FLASH.Itisoneofindispensableimportantunit.Itsperformancedirectlyaffectstheperformanceofthewholesystem.Inthispaper,firstintroducestheresearchactualityofCMOSbandgapreferencesourceandtheselectedtopicbackgroundandsignificance.RespectivelyusingintegratedchipMC1403andTL431basicelectroniccircuitdesignbasedonthebandgapofthebenchmark,underthesimulationsoftwareMultisim13.0simulationschematicdiagram,theoutputvoltageof1.25V±1%.BasedonstandardCMOSbandgapvoltagereferencesource,includingcorecircuit,operationalamplifier,andthedesignofthebiascircuit.Underthe5Vpowersupplyvoltage,basedontheSMIC0.35μmCMOS2P3Mprocess,usingtheSpectresimulatorwascarriedoutonthebandgapvoltagereferencesourcecircuitsimulation,finallygetthePowerSupplyRejectionRatio(PSRR)isgreaterthan70dB,TemperatureCoefficient(TC)islessthan10ppm/°C,benchmarkoutputvoltageof1.25V±0.3%.FinallyusingCadenceVirtuosodesigntool,designofcircuitlayoutandthroughthevalidation.Keywords:BandgapReference;Layout;PowerSupplyRejectionRatio;TemperatureCoefficientIII目录第1章绪论············································································11.1带隙基准源概述······························································11.1.1带隙基准源的研究现状·········································11.1.2研究目的及意义··················································31.2论文主要工作和结构························································3第2章带隙基准基本原理···························································52.1与电源无关的偏置···························································52.2与温度无关的基准···························································52.2.1负温度系数电压··················································62.2.2正温度系数电压··················································72.3带隙基准的产生······························································82.4带隙基准的性能指标························································82.5几种传统带隙基准结构···················································102.5.1Widlar带隙基准源··············································102.5.2Brokaw带隙基准源·············································112.5.3CMOS带隙基准·················································122.6本章小结·····································································13第3章带隙基准源设计·····························································143.1带隙基准的原理图设计···················································143.1.1基于MC1403的基准源设计·································143.1.2基于TL431的基准源设计····································153.2基于CMOS工艺的基准源设计·········································173.2.1设计指标··························································173.2.2带隙基准源架构·················································173.2.3核心电路设计····················································203.2.4运放设计··························································223.2.5偏置电路设计····················································23IV3.2.6整体电路实现····················································233.2.7仿真分析··························································253.3本章小结·····································································27第4章带隙基准版图设计··························································284.1版图设计考虑因素·························································284.1.1匹配性考虑·······················································284.1.2抗干扰性考虑····················································294.1.3失效机制的考虑·················································294.2带隙基准源版图设计······················································304.2.1电阻的版图·······················································304.2.2双极晶体管的版图··············································304.2.3电容的版图·······················································314.2.4带隙基准总体版图··············································314.2.4版图的验证·······················································324.3本章小结·····································································33结论························································································34致谢························································································35参考文献··················································································361第1章绪论集成电路已经发展到系统级芯片(SOC)的阶段,随着半导体工艺的进步,CMOS电路的低成本、低功耗以及速度的不断提升,模拟集成电路技术的不断改进,CMOS集成电路设计在SOC中变得越来越重要。基准源是模拟集成电路中常见的重要组成模块,被广泛应用于需要高精度的参考电位电路中,比如高精度比较器、ADC、DAC、收发器、RAM、FLASH等。在众多基准源中,带隙基准源因其良好的温度特性和电路结构而受到广泛应用。1.1带隙基准源概述带隙基准源泛应用于收
本文标题:带隙基准
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