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-1-*Thispreliminarydatasheetissubjecttochangewithoutnotification.FEARURES300MHzto450MHzFrequencyRange-109dBmHighSensitivity,1KbpsandBER10E-2@315MHzand433.92MHzImageRejectionFunctionLowPowerConsumptionExcellentSelectivityandNoiseRejectionNoExternalIFFilterRequiredLowExternalpartcountSOP-8PackageTypeDESCRIPTIONTheSYN531RisanUHFASKreceiverICinasmallSOP-8packagewhichoperatesat300MHzto450MHzwithtypicalreceivingsensitivityof-109dBm.TheSYN531RisaWeaverarchitecturereceiverforASKandOOKmodulationsuchaspulsewidthmodulation,variablepulsemodulation,Manchestermodulationandsoon.TheWeaverreceiveralsoprovidesimagerejectionfunctiontoremovetheimagebandandselectsthedesiredsignal.ThehighintegratedSYN531Rusesthelowcost8-LeadSmallOutlinePackage(SOP-8),noextraexternalcomponentisrequiredexcepttwocapacitors(CTHandCAGC),referencecrystalandantennamatchingnetwork.TheSYN531RprovidestheShutDownfunctionpin(SHDN).ApplicationsAutomotiveRemoteKeylessEntry(RKE)RemoteControlSystemAccessControlSystemHomeAutomationToys-2-*Thispreliminarydatasheetissubjecttochangewithoutnotification.TYPICALAPPLICATION433.92MHz,1KHzBaudRateApplicationCircuitSYN531Rrequiresonlythreecomponentstooperate:twocapacitors(CTHandCAGC)andthereferencefrequencydevice,usuallyaquartzcrystal.Additionalfivecomponentsmaybeusedtoimproveperformance.Theseare:powersupplydecouplingcapacitor,twocomponentsforthematchingnetwork,andtwocomponentsforthepre-selectorbandpassfilter.PINCONFIGURATIONROANTGNDVDD1SHDN2348CAGC7CTH6DO5SYN531RSOP-8PINDESCRIPTIONPinNameI/OFunction1ANTIRFInput2GNDGNDGround3VDDPOWERPowerSupply4SHDNIShutDown5DOODataOutput6CTHISlicingLevelCapacitor7CAGCIFiltercapacitorConnectedtoAGC8ROIReferenceCrystalOscillator-3-*Thispreliminarydatasheetissubjecttochangewithoutnotification.ABSOLUTEMAXIMUMRATINGSOPERATINGRATINGSELECTRICALCHARACTERISTICSUnlessotherwisenoted,VDD=5V,CAGC=1μF,CTH=0.1μF,1Kbpsdatarate(Manchesterencoded,BER=10E-2),alltestatTA=25°C.ReceiverSymbolParameterConditionsMin.Typ.Max.UnitsfRXFrequencyInputRange300to450MHzPIN,MAXMaximumInputPower10dBmPSENSReceiverSensitivity(Note2)fRX=315MHz-109dBmfRX=433.92MHz-109dBmImageRejectionfRX=315MHz20dBfRX=433.92MHz20dBfIF1stIFCenterFrequencyfRX=315MHz0.86MHzfRX=433.92MHz1.2MHzIFBandwidthfRX=315MHz235KHzfRX=433.92MHz330KHzReceiveModulationDutyCycleNote32080%VAGCAGCDynamicVoltagePIN=-40dBm1.15VPIN=-100dBm1.7VReferenceOscillatorSymbolParameterConditionsMin.Typ.Max.UnitsfOSCFrequencyfRX=315MHz9.8131MHzfRX=433.92MHz13.51783MHzInputRange0.21.5VPPIOSCSCSourceCurrentV(RO)=0V3.5μASupplyVoltage…………………..7VInputVoltage……………….....…7VESDRating……………….….Note1StorageTemperatureRange……-65°Cto150°CJunctionTemperature………………………150°CLeadTemperature(soldering,10sec.)…...260°CSupplyVoltage……….…3.6Vto5.5VInputVoltage(Max.)………..…5.5VAmbientTemperature(TA)……….-40°Cto85°C-4-*Thispreliminarydatasheetissubjecttochangewithoutnotification.DODriveSymbolParameterConditionsMin.Typ.Max.UnitsDOpinOutputCurrentSource@0.8VDD260μASink@0.2VDD600μATRISEOutputRiseandFallTimesCL=15pF,pinDO,10-90%2μsecTFALL2μsecPowerSupplySymbolParameterConditionsMin.Typ.Max.UnitsICCSupplyCurrent@VDD=5VfRX=315MHz4.5mAfRX=433.92MHz7.0mAIOFFShutDownCurrentSHDN=High0.5μANote1:DeviceisESDsensitive.UseappropriateESDprecautions.Exceedingtheabsolutemaximumratingmaydamagethedevice.Note2:Sensitivityisdefinedastheaveragesignallevelmeasuredattheinputnecessarytoachieve10-2BER(biterrorrate).Theinputsignalisdefinedasareturn-to-zero(RZ)waveformwith50%averagedutycycle(Manchesterencoded)atadatarateof1kbps.Note3:Whendataburstdoesnotcontainpreamble,dutycycleisdefinedastotaldutycycle,includingany“quiet”timebetweendatabursts.WhendataburstscontainpreamblesufficienttochargethesliceleveloncapacitorCTH,thendutycycleistheeffectivedutycycleoftheburstalone.[Forexample,100msecburstwith50%dutycycle,and100msec“quiet”timebetweenbursts.Ifburstincludespreamble,dutycycleisTON/(TON+TOFF)=50%;withoutpreamble,dutycycleisTON/(TON+TOFF+TQUIET)=50msec/(200msec)=25%.TONisthe(Averagenumberof1’s/burst)×bittime,andTOFF=TBURST–TON.]-5-*Thispreliminarydatasheetissubjecttochangewithoutnotification.TYPICALCHARACTERISTICSUnlessotherwisenoted,VDD=5V,CAGC=1μF,CTH=0.1μF,1Kbpsdatarate(Manchesterencoded,BER=10E-2),alltestatTA=25°C.-6-*Thispreliminarydatasheetissubjecttochangewithoutnotification.BLOCKDIAGRAMLNAΣANTSilicerPLL&LOREFOSCVDDGNDDOROAnalogFilterCTHAGCCAGCFigure1SimplifiedBlockDiagramFUNCTIONALDESCRIPTIONFigure1SimplifiedBlockDiagramthatillustratesthebasicstructureoftheSYN531R.Itiscomposedoffivemodules;LowNoiseAmplifier,Weaverarchitecturereceiver,theSlicer,AutoGainControlandReferenceandControlLogics.LNATheRFinputsignalisAC-coupledintothegatecircuitofthegroundedsourceLNAinputstage.TheLNAusesaCascodedNMOSstructurecircuit,andtheoutputisconvertedtodifferentialsignalsfornextstagemixers.WeaverReceiverTheLNAoutputsignalsarefirstmixedwithquadraturephasesofthelocaloscillatorsignal.Afterfilteringbothmixeroutputwithalow-passfilter,theoutputsignalsaremixedagainbyanothersetofmixingoperationinbothsignalpaths,thesumofthetwofinalsignalsca
本文标题:SYN531R-Datasheet-Version-2.0
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