5-第二部分：-F2812时钟与控制系统

第五部分：F2812时钟与控制系统C28xGPIO寄存器结构GPIOAMuxControlRegister(GPAMUX)GPIOADirectionControlRegister(GPADIR)GPIOAGPIOBMuxControlRegister(GPBMUX)GPIOBDirectionControlRegister(GPBDIR)GPIOBGPIODMuxControlRegister(GPDMUX)GPIODDirectionControlRegister(GPDDIR)GPIODGPIOEMuxControlRegister(GPEMUX)GPIOEDirectionControlRegister(GPEDIR)GPIOEGPIOFMuxControlRegister(GPFMUX)GPIOFDirectionControlRegister(GPFDIR)GPIOFGPIOGMuxControlRegister(GPGMUX)GPIOGDirectionControlRegister(GPGDIR)GPIOGInternalBusGPIOA,B,D,EincludeInputQualificationfeatureGPIOAGPIOA0/PWM1GPIOA1/PWM2GPIOA2/PWM3GPIOA3/PWM4GPIOA4/PWM5GPIOA5/PWM6GPIOA6/T1PWM_T1CMPGPIOA7/T2PWM_T2CMPGPIOA8/CAP1_QEP1GPIOA9/CAP2_QEP2GPIOA10/CAP3_QEPI1GPIOA11/TDIRAGPIOA12/TCLKINAGPIOA13/C1TRIPGPIOA14/C2TRIPGPIOA15/C3TRIPGPIOBGPIOB0/PWM7GPIOB1/PWM8GPIOB2/PWM9GPIOB3/PWM10GPIOB4/PWM11GPIOB5/PWM12GPIOB6/T3PWM_T3CMPGPIOB7/T4PWM_T4CMPGPIOB8/CAP4_QEP3GPIOB9/CAP5_QEP4GPIOB10/CAP6_QEPI2GPIOB11/TDIRBGPIOB12/TCLKINBGPIOB13/C4TRIPGPIOB14/C5TRIPGPIOB15/C6TRIPGPIODGPIOD0/T1CTRIP_PDPINTAGPIOD1/T2CTRIP/EVASOCGPIOD5/T3CTRIP_PDPINTBGPIOD6/T4CTRIP/EVBSOCGPIOEGPIOE0/XINT1_XBIOGPIOE1/XINT2_ADCSOCGPIOE2/XNMI_XINT13GPIOFGPIOF0/SPISIMOAGPIOF1/SPISOMIAGPIOF2/SPICLKAGPIOF3/SPISTEAGPIOF4/SCITXDAGPIOF5/SCIRXDAGPIOF6/CANTXAGPIOF7/CANRXAGPIOF8/MCLKXAGPIOF9/MCLKRAGPIOF10/MFSXAGPIOF11/MFSRAGPIOF12/MDXAGPIOF13/MDRAGPIOF14/XFGPIOGGPIOG4/SCITXDBGPIOG5/SCIRXDBC28xGPIO引脚分配Note:GPIOarepinfunctionsatresetGPIOA,B,D,EincludeInputQualificationfeatureC28xGPIO功能框图•••10MUXControlBit0=I/OFunction1=PrimaryFunctionPinPrimaryPeripheralFunctionI/ODATBit(R/W)InOut•I/ODIRBit0=Input1=OutputGPxMUXGPxDIRGPxDATGPxSETGPxCLEARGPxTOGGLEQUALPRDreserved7-015-8GPxQUAL00hnoqualification(SYNCtoSYSCLKOUT)01hQUALPRD=SYSCLKOUT/202hQUALPRD=SYSCLKOUT/4FFhQUALPRD=SYSCLKOUT/510.........SomedigitalI/OandperipheralI/OinputsignalsincludeanInputQualificationfeatureC28xGPIOMUX/DIR寄存器AddressRegisterName70C0hGPAMUXGPIOAMuxControlRegister70C1hGPADIRGPIOADirectionControlRegister70C2hGPAQUALGPIOAInputQualificationControlRegister70C4hGPBMUXGPIOBMuxControlRegister70C5hGPBDIRGPIOBDirectionControlRegister70C6hGPBQUALGPIOBInputQualificationControlRegister70CChGPDMUXGPIODMuxControlRegister70CDhGPDDIRGPIODDirectionControlRegister70CEhGPDQUALGPIODInputQualificationControlRegister70D0hGPEMUXGPIOEMuxControlRegister70D1hGPEDIRGPIOEDirectionControlRegister70D2hGPEQUALGPIOEInputQualificationControlRegister70D4hGPFMUXGPIOFMuxControlRegister70D5hGPFDIRGPIOFDirectionControlRegister70D8hGPGMUXGPIOGMuxControlRegister70D9hGPGDIRGPIOGDirectionControlRegisterAddressRegisterName70E0hGPADATGPIOADataRegister70E1hGPASETGPIOASetRegister70E2hGPACLEARGPIOAClearRegister70E3hGPATOGGLEGPIOAToggleRegister70E4hGPBDATGPIOBDataRegister70E5hGPBSETGPIOBSetRegister70E6hGPBCLEARGPIOBClearRegister70E7hGPBTOGGLEGPIOBToggleRegister70EChGPDDATGPIODDataRegister70EDhGPDSETGPIODSetRegister70EEhGPDCLEARGPIODClearRegister70EFhGPDTOGGLEGPIODToggleRegister70F0hGPEDATGPIOEDataRegister70F1hGPESETGPIOESetRegister70F2hGPECLEARGPIOEClearRegister70F3hGPETOGGLEGPIOEToggleRegister70F4hGPFDATGPIOFDataRegister70F5hGPFSETGPIOFSetRegister70F6hGPFCLEARGPIOFClearRegister70F7hGPFTOGGLEGPIOFToggleRegister70F8hGPGDATGPIOGDataRegister70F9hGPGSETGPIOGSetRegister70FAhGPGCLEARGPIOGClearRegister70FBhGPGTOGGLEGPIOGToggleRegisterC28xGPIO数据寄存器C28xOsc/PLL时钟模块PLLCR@7021hDIV3DIV2DIV1DIV0ClockFrequency(CLKIN)0000OSCCLKx1/2(noPLL)0001OSCCLKx1/20010OSCCLKx2/20011OSCCLKx3/20100OSCCLKx4/20101OSCCLKx5/20110OSCCLKx6/20111OSCCLKx7/21000OSCCLKx8/21001OSCCLKx9/21010OSCCLKx10/2PLLCRbits15:4reservedcrystalPLLClockModule4-bitPLLSelectX1/CLKINX2XTALOSCWatchdogModule/2PLLCLKOSCCLK•C28xCoreCLKINMUXXF_XPLLDIS10SYSCLKOUTHISPCPLOSPCPHSPCLKLSPCLK••1、PLL旁路2、PLL使能外设时钟控制寄存器PCLKCR@701ChModuleEnableClockBit0=disable1=enable0reservedreserved1234567EVAENCLKEVBENCLKreservedADCENCLKreservedreservedECANENCLKSPIAENCLKSCIBENCLK89101112131415reservedSCIAENCLKMCBSPENCLKreservedreservedHSPCLKLSPCLK高/低速外设时钟预定标寄存器HISPCP@701Ah/LOSPCP@701Bh0215-3HSPCLKreservedH/LSPCLK2H/LSPCLK1H/LSPCLK0PeripheralClockFrequency000SYSCLKOUT/1001SYSCLKOUT/2(defaultHISPCP)010SYSCLKOUT/4(defaultLOSPCP)011SYSCLKOUT/6100SYSCLKOUT/8101SYSCLKOUT/10110SYSCLKOUT/12111SYSCLKOUT/140215-3LSPCLKreserved看门狗定时器如果CPU崩溃，则复位系统看门狗计数器独立与CPU如果计数器溢出则复位或中断被触发为防止计数器溢出，CPU必须周期性的向看门狗KEY寄存器写入0X55+0XAA序列在复位之后(30M外部时钟)3ms之内看门狗必须被启用或者禁止看门狗定时器模块6-BitFree-RunningCounterCLR/2/4/8/16/32/64OSCCLKSystemReset101100011010001000111110••••8-BitWatchdogCounterCLROne-CycleDelayWatchdogResetKeyRegister55+AADetector•GoodKeyBadKey101••••//33WDCR.2-0WDCR.6WDPSWDDISWDCR.7WDFLAGWDCNTR.7-0WDKEY.7-0WDCR.5-3WDCHK2-0BadWDCRKey/512OutputPulseWDRSTWDINTSCSR.1WDENINT•••SCSR.0WDOVERRIDE看门狗定时控制寄存器WDCR@7029hWDFLAGWDDIS76543210WDCHK1WDCHK0WDPS2WDPS1WDPS0WDCHK2LogicCheckBitsWriteas101orresetimmediatelytriggeredWDPrescaleSelectionBitsWatchdogDisableBit(FunctionsonlyifWDOVERRIDEbitinSCSRisequalto1)reserved15-8WDFlagBitGetssetwhentheWDcausesareset•Writinga1clearsthisbit•Writinga0hasnoeffect看门狗复位密钥寄存器WDKEY@7025h允许写入的数值:55h–在AAH之后的写入55使能计数器AAh–如果复位使能则计数器清零写入