μCOS-II and ARM Cortex-M3 Processors

Micriµm©Copyright2006,MicriµmAllRightsreservedµC/OS-IIandARMCortex-M3ProcessorsApplicationNoteAN-1018’smodel.....................................63.00µC/OS-IIPortfortheARMCortex-M3processors........................93.01DirectoriesandFiles.....................................................................103.02OS_CPU.H....................................................................................113.02.01OS_CPU.H,macrosfor‘externals’................................................113.02.02OS_CPU.H,DataTypes...............................................................113.02.03OS_CPU.H,CriticalSections........................................................123.02.04OS_CPU.H,Stackgrowth.............................................................123.02.05OS_CPU.H,TaskLevelContextSwitch........................................133.02.06OS_CPU.H,FunctionPrototypes..................................................133.03OS_CPU_C.C...............................................................................143.03.01OS_CPU_C.C,OSInitHookBegin()...............................................143.03.02OS_CPU_C.C,OSTaskCreateHook()...........................................153.03.03OS_CPU_C.C,OSTaskStkInit()....................................................163.03.04OS_CPU_C.C,OSTaskSwHook().................................................183.03.05OS_CPU_C.C,OSTimeTickHook()...............................................183.04OS_CPU_A.ASM..........................................................................193.04.01OS_CPU_A.ASM,OS_CPU_SR_Save()......................................193.04.02OS_CPU_A.ASM,OS_CPU_SR_Restore()..................................193.04.03OS_CPU_A.ASM,OSStartHighRdy()...........................................203.04.04OS_CPU_A.ASM,OSCtxSw()......................................................213.04.05OS_CPU_A.ASM,OSIntCtxSw()..................................................223.04.06OS_CPU_A.ASM,OSPendSV()....................................................223.05OS_DBG.C...................................................................................264.00ExceptionVectorTable.................................................................274.01Exception/InterruptHandlingSequence......................................284.02InterruptControllers......................................................................284.03InterruptServiceRoutines.............................................................285.00ApplicationCode...........................................................................295.01APP.C,APP.HandAPP_CFG.H..................................................305.02INCLUDES.H................................................................................332µC/OS-IIforARMCortex-M3Processors6.00BSP(BoardSupportPackage)......................................................346.01BSP(BoardSupportPackage)–LEDManagement.....................346.02BSP(BoardSupportPackage)–ClockTick.................................357.00Conclusion....................................................................................36Licensing.......................................................................................37References....................................................................................37Contacts........................................................................................37Notes.............................................................................................383µC/OS-IIfortheARMCortex-M3Processors1.00IntroductionARMhasbeenworkingonanewarchitecturecalledtheCortexforanumberofyears.Duringdevelopment,µC/OS-IIwasusedtovalidatesomeofthedesignaspectsandwasusedasasourceofideastocreatenewcapabilitiestosupportRTOSs.Inotherwords,µC/OS-IIwasthefirstRTOSportedtotheCortex.Thisapplicationnotedescribesthe‘official’MicriumportforµC/OS-IIontheCortex-M3processor.Figure1-1showsablockdiagramshowingtherelationshipbetweenyourapplication,µC/OS-II,theportcodeandtheBSP(BoardSupportPackage).Relevantsectionsofthisapplicationnotearereferencedonthefigure.4µC/OS-IIforARMCortex-M3ProcessorsµC/OS-IIOS_CORE.COS_FLAG.COS_MBOX.COS_MEM.COS_MUTEX.COS_Q.COS_SEM.COS_TASK.COS_TIME.COS_TMR.CuCOS_II.HµC/OS-IICortexM3PortOS_CPU_C.COS_CPU_A.ASMOS_CPU.HOSDBG.CYourApplicationAPP.CAPP_VECT.CAPP_CFG.HINCLUDES.HOS_CFG.HBSPBSP.CBSP.HARMCortex-M3/TargetBoardSection2Section3Section6Section5µC/OS-IIBookFigure1-1,Relationshipbetweenmodules.5µC/OS-IIfortheARMCortex-M3Processors2.00TheARMCortex-M3programmer’smodelThevisibleregistersinanARMCortex-M3processorareshowninFigure2-1.TheARMCortex-M3hasatotalof20registers.Eachregisteris32bitswide.R0-R12R0throughR12aregeneralpurposeregistersthatcanbeusedtoholddataaswellaspointers.R13Isgenerallydesignatedasthestackpointer(alsocalledtheSP)butcouldbetherecipientofa