美国模拟器件：PCB设计经典资料-1

TheWorldLeaderinHighPerformanceSignalProcessingSolutionsPCB(PrintedCircuitBoard)PCB(PrintedCircuitBoard)LayoutAgenda
PCBLayoutBasicsPCBBasicsPCBLayoutParasiticsCurrentReturnPath
PCBLayoutTechniquesLocation!Location!Location!2SplitPower/GroundPlaneConsiderationPowerSupplyBypassing(Decoupling)ShieldingandGuardingRing
CaseStudy
ReferenceReadingsPCBBasics3PCBBasics
PCBmethodologiesoriginatedintheUnitedStates
UnitsofmeasurementarethereforetypicallyinImperialunits,notSI/metricunits.Boarddimensionsarecommonlymeasuredininches.Dielectricthickness&conductorlengthandwidthtypicallymeasuredininchesand“mils”.PCBBasics:PCBUnitsofMeasurement4
1mil=0.001inches
1mil=.0254mmConductorthicknessmeasuredinounces(oz).
Theweighofconductormetalinasquarefoot(ft2)ofmaterial.
Typicalthickness0.5oz=17.5μm1.0oz=35.0μm2.0oz=70.0μm3.0oz=105.0μmPCBBasics:PCBStack-upPrepregCorePrepregCorePrepregCorePrepregCopperFoilCrossSectionofatypical8-layerstack-up5
APCBconsistsofalternatinglayersofprepregandcorematerials
Materials:Core:Athinpieceofcureddielectric(usuallyFR4:fiberglass&epoxy)Prepreg:Shortforpreimpregnated.Athinpieceofuncureddielectric(usually“FR4”:fiberglass-epoxy).Prepregmeltsintoanepoxygluewhenheatedandpressed,andthenhardens/cureswiththesamedielectricconstantasthecorematerial.CopperFoil:Thinpieceofcopperthatisbonded/laminatedtobothsidesofthecoreusingepoxyresin.
Thenumberoflayersofcopperfoilcorrespondstothe“layersofthePCB”An8-layerPCBhas8layersofcopperfoil.
Stack-upissymmetricalaboutthecenteroftheboardintheverticalaxistoavoidmechanicalstressintheboardunderthermalcycling.PCBAnatomy:PCBConductors:TracesLRsLLR=⋅=⋅=ρρ6
Copper(Cu)isthemostcommonlyusedconductorinPCBs.Tracesand/orconnectorsmaybeplatedinnickelfollowedbygoldtoprovideacorrosion-resistantelectricallyconductive.
TraceWidth(W)andLength(L)–controlledbyPCBlayoutengineerWidthandspacingbetweentracestypically≥5milincommonfabricationprocesses
TraceThickness(h)–variableoffabricationprocessTypically0.5oz–3ozTrendtowards0.25oz
SignalIntegrityTip:Alloftheaboveaffecttheresistance,capacitanceandimpedanceofthetraceandmustbewellunderstoodforhigh-speeddesign.Source:⋅⋅=⋅=ρρCuresistivity:ρ=1.7E10-8ΩmPCBBasics:PCBConductors:PowerPlanesPrepregCorePrepregCorePrepregCorePrepregCopperFoilSignaltracePowerplane7
PowerPlanesAsolidlayerofcopperusedtoprovidepowerorground.Typicallyusethickercopperlayerthansignallayerstoreduceresistance.
Whyaretheyneeded?Provideastable,low-impedancepathforpowerandgroundsignalstoalldevicesonthePCBShieldsignalsbetweenlayerstominimizecross-talk
SignalIntegrityTip:Byplacingpowerandgroundonoppositesidesofthincorematerial,wecanmaximizethe“intra-planecapacitance”.Also,thisminimizesPCBwarping.PCBBasics:PCBInsulators/Dielectrics
CommonDielectricMaterialsFR-4(Wovenfiberglassandepoxy)
Mostcommonlyused,widelyavailable,relativelylow-cost
Dielectricconstant(permittivity):4.70Max,4.35@500MHz,4.34@1GHzAcceptableforsignalsuptoabout2GHz(lossandcross-talkwillincreasebeyondthis)
Fairlyrigid(17GPausingYoung’smodulus)FR-2(Phenoliccottonpaper)
Verylow-cost,usedincheapconsumerdevices.
Susceptibletocracking8
Susceptibletocracking
Dielectricconstant(permittivity):4.5@1GHzCEM-3(Wovenglassandepoxy)
VerysimilartoFR4,widelyusedinJapanPolyimide
GoodperformanceathighfrequenciesFR&CEM
FR:FlameRetardant
CEM:CompositeEpoxyMaterial
SignalIntegrityTip:MostPCBinsulatormaterialssupportarelativelycontrolleddielectric-thisisimportantformaintainingaconstantimpedancefortransmissionlines!PCBBasics:ViasViaBlindViaBuriedVia9
Vias(platedholes)UsedtoconnectlayersFormedbydrillingorpunchingholethroughPCBlayersandplatingtheinsideTypicallymuchlargerthansignaltraces
BuriedandBlindViasProvideincreasedwiringdensityAddedcosttoPCBfabrication–typicallyusedonlyinhigh-volumeBuriedviasaredifficulttodebug
SignalIntegrityTip:viasintroducecapacitanceandchangethecharacteristicimpedanceofatrace.PCBLayoutParasitics10PCBLayoutParasiticsRXZYρρρρ=RESISTIVITYR=ρρρρXZYCalculationofSheetresistance(ForStandardCopperPCB)11XSHEETRESISTANCECALCULATIONFOR1OZ.COPPERCONDUCTOR:ρρρρ=1.724X10–6ΩΩΩΩcm,Y=0.0036cmR=0.48mΩΩΩΩ=NUMBEROFSQUARESR=SHEETRESISTANCEOF1SQUARE(Z=X)=0.48mΩΩΩΩ/SQUAREXZXZ16-BITADC,RIN=5kΩΩΩΩSIGNALSOURCE0.25mm(10mils)wide,1oz.copperPCBtrace5cmAssumegroundpathresistancenegligibleLongTrackResistanceImpactonADC12resistancenegligible
OHM’sLawpredicts1LSBoferrorduetodropinPCBconductor.Considera16-bitADCwitha5kΩΩΩΩinputresistance,PCBtrackis5cmof0.25mmwide1oz.Thetrackresistanceofnearly0.1ΩΩΩΩ.Theresultingvoltagedropisagainerrorof0.1/5k(~0.0019%),Over1LSB(0.0015%for16bits).Trace/PadCapacitancedAExample:PadofSOICL=0.2cmW=0.063cmK=4.7A=0.126cm2d=0.073cm13dkAC3.11=K=relativedielectricconstantA=areaincm2d=spacingbetweenplatesincmReduceCapacitance1)Increaseboardthickness2)Reducetrace/padarea3)Removegroundplaned=0.073cmC=0.072pFApproximateTraceInductanceAlldimensionsareinmm14ExampleL=2.54cm=25.4mmW=.25mmH=.035mm(1o