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沈阳理工大学学士学位论文I摘要在现代电子技术的设计与开发过程中,特别是在通信、雷达、航空、航天以及仪器仪表等领域,都需要进一步提高一系列高精度、高稳定度的频率源的频率精度。这样,一般的振荡器已经无法满足各种应用的发展要求,而晶体振荡器的性能虽然比较好,但其频率单一,或只能在极小的范围内进行微调。锁相环是一个相位误差控制系统。它比较输入信号和振荡器输出信号之间的相位差,从而产生误差控制信号来调整振荡器的频率,以达到与输入信号同频同相。本课题给出一种以单片集成PLL芯片74HC4046为核心,并通过AT89C51单片机对74HC4046进行控制来实现锁相频率合成器的设计方法,设计一个由单片机、定时计数器及单片集成锁相环路组成的可编程控制频率合成器。本文在介绍了74HC4046芯片的内部功能结构的基础上,探讨了锁相频率合成器的基本原理和工作特性,给出了74HC4046的锁相频率合成器的硬件电路结构和软件程序设计方法。该设计经仿真测试证明,锁相效果良好,结构精简,性能可靠。关键词:74HC4046;AT89C51;频率合成器沈阳理工大学学士学位论文IIAbstractInthedesignanddevelopmentprocessofmodernelectronictechnology,especiallyincommunication,radar,aviation,aerospace,instrumentationandotherfields,areneededtofurtherimprovetheprecisionoffrequencyfrequencysourceisaseriesofhighprecision,highstability.Inthisway,theoscillatorhasbeenunabletomeetthedevelopmentrequirementsofvariousapplications,whiletheperformanceofcrystaloscillatorisgood,butthesinglefrequency,oronlyinthecontextofminimalfine-tuning.Phaselockedloopisaphaseerrorcontrolsystem.Itcomparestheinputsignalandtheoutputsignaloftheoscillatorphasedifference,therebygeneratinganerrorcontrolsignaltoadjustthefrequencyoftheoscillator,inordertoachievethesamefrequencyandphasewiththesignalinput.Thistopicistodesignacomposedofsingle-chip,timingcounterandmonolithicintegratedPLLProgrammablecontrolfrequencysynthesizer,sothedesignprocesswillinvolveaphaselockedloop,frequencysynthesizerandthemicrocontrollerknowledge.ThispaperpresentsamonolithicintegratedPLLchip74HC4046asthecore,andthroughtheAT89C51MCUtocontrol74HC4046torealizethedesignmethodofPLLfrequencysynthesizer.Inthispaperthebasicfunctionalstructureofchipof74HC4046,discussesthebasicprincipleandworkingcharacteristicsofPLLfrequencysynthesizer,thehardwarestructureandsoftwaredesignmethodofPLLFrequencySynthesizerBasedon74HC4046isgiven.Thedesignofthesimulationtest,thelock-ineffectisgood,simplestructure,reliableperformance.Keywords:74HC4046;AT89C51;frequencysynthesizer沈阳理工大学学士学位论文III目录摘要.........................................................................................................................................IAbstract......................................................................................................................................II1绪论...................................................................................................................................11.1设计背景及意义.......................................................................................................31.2锁相环频率合成器综述...........................................................................................32基于单片机的锁相环频率合成器方案设计与论证.........................................................42.1课题研究的内容与要求...........................................................................................42.2方案的设计与选择...................................................................................................42.3设计原理...................................................................................................................52.3.1锁相环基本原理............................................................................................62.3.2锁相频率合成器的基本原理........................................................................83基于单片机的锁相环频率合成器设计方案....................................................................103.1硬件系统的设计.....................................................................................................103.1.174HC4046.....................................................................................................103.1.2CD4522.........................................................................................................153.1.3LCD1602......................................................................................................163.1.4AT89C51单片机..........................................................................................183.2软件系统设计.........................................................................................................223.2.1软件系统主程序流程图................................................................................223.2.2键盘扫描流程图..............................................................................................233.2.3脉冲计数流程图..............................................................................................244电路仿真..............................................................................................................................254.1仿真软件介绍.........................................................................................................254.1.1proteus..........................................................................................................254.1.2Keil编译软件..............................................................................................264.2硬件电路仿真.........................................................................................................274.2.1锁相环模块..................................................................................................274.2.24522分频器模块.......................
本文标题:基于单片机的锁相环频率合成器设计
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