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ThisDataSheetstatesAMD’scurrenttechnicalspecificationsregardingtheProductdescribedherein.ThisDataSheetmayberevisedbysubsequentversionsormodificationsduetochangesintechnicalspecifications.Publication#21490Rev:GAmendment/+2IssueDate:August14,2000Am29LV800B8Megabit(1Mx8-Bit/512Kx16-Bit)CMOS3.0Volt-onlyBootSectorFlashMemoryDISTINCTIVECHARACTERISTICSnSinglepowersupplyoperation—2.7to3.6voltreadandwriteoperationsforbattery-poweredapplicationsnManufacturedon0.32μmprocesstechnology—Compatiblewith0.5μmAm29LV800devicenHighperformance—Accesstimesasfastas70nsnUltralowpowerconsumption(typicalvaluesat5MHz)—200nAAutomaticSleepmodecurrent—200nAstandbymodecurrent—7mAreadcurrent—15mAprogram/erasecurrentnFlexiblesectorarchitecture—One16Kbyte,two8Kbyte,one32Kbyte,andfifteen64Kbytesectors(bytemode)—One8Kword,two4Kword,one16Kword,andfifteen32Kwordsectors(wordmode)—Supportsfullchiperase—SectorProtectionfeatures:AhardwaremethodoflockingasectortopreventanyprogramoreraseoperationswithinthatsectorSectorscanbelockedin-systemorviaprogrammingequipmentTemporarySectorUnprotectfeatureallowscodechangesinpreviouslylockedsectorsnUnlockBypassProgramCommand—ReducesoverallprogrammingtimewhenissuingmultipleprogramcommandsequencesnToporbottombootblockconfigurationsavailablenEmbeddedAlgorithms—EmbeddedErasealgorithmautomaticallypreprogramsanderasestheentirechiporanycombinationofdesignatedsectors—EmbeddedProgramalgorithmautomaticallywritesandverifiesdataatspecifiedaddressesnMinimum1millionwritecycleguaranteepersectorn20-yeardataretentionat125°C—ReliableoperationforthelifeofthesystemnPackageoption—48-ballFBGA—48-pinTSOP—44-pinSO—KnownGoodDie(KGD)(seepublicationnumber21536)nCompatibilitywithJEDECstandards—Pinoutandsoftwarecompatiblewithsingle-powersupplyFlash—SuperiorinadvertentwriteprotectionnData#Pollingandtogglebits—ProvidesasoftwaremethodofdetectingprogramoreraseoperationcompletionnReady/Busy#pin(RY/BY#)—ProvidesahardwaremethodofdetectingprogramorerasecyclecompletionnEraseSuspend/EraseResume—Suspendsaneraseoperationtoreaddatafrom,orprogramdatato,asectorthatisnotbeingerased,thenresumestheeraseoperationnHardwareresetpin(RESET#)—Hardwaremethodtoresetthedevicetoreadingarraydata2Am29LV800BGENERALDESCRIPTIONTheAm29LV800Bisan8Mbit,3.0volt-onlyFlashmemoryorganizedas1,048,576bytesor524,288words.Thedeviceisofferedin48-ballFBGA,44-pinSO,and48-pinTSOPpackages.ThedeviceisalsoavailableinKnownGoodDie(KGD)form.Formoreinformation,refertopublicationnumber21536.Theword-widedata(x16)appearsonDQ15–DQ0;thebyte-wide(x8)dataappearsonDQ7–DQ0.Thisdevicerequiresonlyasingle,3.0voltVCCsupplytoperformread,program,anderaseoperations.AstandardEPROMprogrammercanalsobeusedtoprogramanderasethedevice.ThisdeviceismanufacturedusingAMD’s0.32μmprocesstechnology,andoffersallthefeaturesandben-efitsoftheAm29LV800,whichwasmanufacturedusing0.5μmprocesstechnology.Inaddition,theAm29LV800Bfeaturesunlockbypassprogrammingandin-systemsectorprotection/unprotection.Thestandarddeviceoffersaccesstimesof70,90,and120ns,allowinghighspeedmicroprocessorstooperatewithoutwaitstates.Toeliminatebuscontentionthedevicehasseparatechipenable(CE#),writeenable(WE#)andoutputenable(OE#)controls.Thedevicerequiresonlyasingle3.0voltpowersup-plyforbothreadandwritefunctions.Internallygener-atedandregulatedvoltagesareprovidedfortheprogramanderaseoperations.ThedeviceisentirelycommandsetcompatiblewiththeJEDECsingle-power-supplyFlashstandard.Com-mandsarewrittentothecommandregisterusingstan-dardmicroprocessorwritetimings.Registercontentsserveasinputtoaninternalstate-machinethatcon-trolstheeraseandprogrammingcircuitry.Writecyclesalsointernallylatchaddressesanddataneededfortheprogramminganderaseoperations.ReadingdataoutofthedeviceissimilartoreadingfromotherFlashorEPROMdevices.Deviceprogrammingoccursbyexecutingtheprogramcommandsequence.ThisinitiatestheEmbeddedProgramalgorithm—aninternalalgorithmthatauto-maticallytimestheprogrampulsewidthsandverifiespropercellmargin.TheUnlockBypassmodefacili-tatesfasterprogrammingtimesbyrequiringonlytwowritecyclestoprogramdatainsteadoffour.Deviceerasureoccursbyexecutingtheerasecommandsequence.ThisinitiatestheEmbeddedErasealgorithm—aninternalalgorithmthatautomaticallypreprogramsthearray(ifitisnotalreadyprogrammed)beforeexecutingtheeraseoperation.Duringerase,thedeviceautomaticallytimestheerasepulsewidthsandverifiespropercellmargin.ThehostsystemcandetectwhetheraprogramoreraseoperationiscompletebyobservingtheRY/BY#pin,orbyreadingtheDQ7(Data#Polling)andDQ6(toggle)statusbits.Afteraprogramorerasecyclehasbeencompleted,thedeviceisreadytoreadarraydataoracceptanothercommand.Thesectorerasearchitectureallowsmemorysectorstobeerasedandreprogrammedwithoutaffectingthedatacontentsofothersectors.Thedeviceisfullyerasedwhenshippedfromthefactory.HardwaredataprotectionmeasuresincludealowVCCdetectorthatautomaticallyinhibitswriteopera-tionsduringpowertransitions.Thehardwaresectorprotectionfeaturedisablesbothprogramanderaseoperationsinanycombinationofthesectorsofmem-ory.Thiscanbeachievedin-systemorviaprogram-mingequipment.Th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