DDR3-SPD-附中文翻译

UnderstandingDDR3SerialPresenceDetect(SPD)TableTuesday,July17,2007IntroductionSinceIwrote揢nderstandingDDRSerialPresenceDetect(SPD)Table?in2003,Ihavebeengettingalotafeedbackfromreaders.Iadded揢nderstandingDDR2SerialPresenceDetect(SPD)Table?in2006.SomeofyoutoldmethatyouareusingthesearticlestotrainyouremployeesandtointroducethemysteriesSPDconcepttoyourcustomers.Ifeelhonoredbyyourresponses.Lately,CSThasstartedshipmentofaDDR3EZProgrammer.SincetheDD3DIMMisintroducedrecently,IthinkthisisthetimetoaddanarticlefortheDDR3SPDTable.Duetothemanymoreyearsofdevelopment,theDD3SPDtablehasdefinitelygotmoresophisticatedthantheoriginalDDRandDDR2SPDtable.Yourattentionisrequiredtounderstandandfollowthrough.IwilltrytouseasmuchlaymanlanguageasIcantoaccommodateyouall.SerialPresenceDetect(SPD)dataisprobablythemostmisunderstoodsubjectinthememorymoduleindustry.MostpeopleonlyknowitasthelittleEepromdeviceontheDIMMthatoftenkeptthemodulefromworkingproperlyinthecomputer.Onthecontrary,itisquitetheopposite.TheSPDdataactuallyprovidevitalinformationtothesystemBiostokeepthesystemworkinginoptimalconditionwiththememoryDIMM.ThisarticleattemptstoguideyouthroughtheconstructionofanSPDtablewith揟urbo-Tax?typeofmultiplechoicesquestions.Ihopeyou抣lfinditinterestinganduseful.SampleJedecStandardSPDDataTableByte0NumberofSerialPDBytesWritten/SPDDeviceSize/CRCCoverage（写入的SPD字节数/EERPOM总字节数/CRC覆盖字节范围）Bit3toBit0describesthetotalsizeoftheserialmemoryactuallyusedintheEEpromfortheSerialPresenceDetectdata.Bit6toBit4describesthenumberofbytesavailableintheEEpromdevice,usually128byteor256byte.Ontopofthat,Bit7indicateswhethertheuniquemoduleidentifiercoveredbytheCRCencodedonbytes126and127isbasedon(0-116byte)orbasedon(0-125byte)..(WhenCSTEZ-SPDProgrammerisused:Simplyselectitemsfrom3tablesandautomaticallycalculatethefinalhexnumber)Themostcommononeusedis:TotalSPDBye=256CRCCoverage=0-116ByteSPDByteused=176ByteResultingcodeis92hByte1SPDRevision（SPD规范版本）Version0.000hRevision0.505hRevision1.010hRevision1.111hRevision1.212hByte2（DRAM类型）DRAMDeviceTypeThisreferstotheDRAMtype.Inthiscase,weareonlydealingwithDDR3SDRAM.DDR3SDRAM:0BhByte3ModuleType（内存module类型）Thisrelatestothephysicalsize,andcategoryofmemorymodule.Undefined00hRDIMM(RegisteredLongDIMM)01hUDIMM(UnbufferedLongDIMM)02hSODIMM(SmallOutlineDIMM)03hByte4SDRAMDensityandBanks（DRAM容量和内部bank数）ThisbytedefinesthetotaldensityoftheDDR3SDRAM,inbits,andthenumberofinternalbanksintowhichthememoryarrayisdivided.PresentlyallDDR3have8internalbanks.SDRAMChipSize512Mb01h1Gb02h2Gb03h4Gb04hByte5SDRAMAddressing（DRAM行列地址线数目）ThisbytedescribestherowaddressingandcolumnaddressingintheSDRAMDevice.512Mbchips13RowX10Column09h13RowX12Column0Bh12RowX10Column01h1Gbchips14RowX10Column11h14RowX12Column13h13RowX10Column09h2Gbchips15RowX10Column19h15RowX12Column1Bh14RowX10Column11hByte6（预留）Reserved00hByte7（内存module架构）ModuleOrganizationThisbytedescribestheorganizationoftheSDRAMmodule;thenumberofRanksandtheDeviceWidthofeachDRAM(WhenCSTEZ-SPDProgrammerisused:SimplyselectnumberofRanksandDeviceWidth.Itautomaticallycalculatefinalhexnumber)1RankmoduleusingX8chips01h2RankmoduleusingX8chips09h1RankmoduleusingX4chips00h2RankmoduleusingX4chips08h4RankmoduleusingX8chips19h4RankmoduleusingX4chips18h1RankmoduleusingX16chips02h2RankmoduleusingX16chips0AhByte8ModuleMemoryBusWidth（内存总位宽）ThisreferstotheprimarybuswidthofthemoduleplustheadditionalwithprovidedbyECC16bit01h32bit04h64bit(noparity)03h64bit+ECC(72bit)0BhByte9Finetimebase(FTB)Dividend/Divisor（时基）Thisbytedefinesavalueinpicosecondsthatrepresentsthefundamentaltimebaseforfinegraintimingcalculations.Thisvalueisusedasamultiplierforformulatingsubsequenttimingparameters.ThegranularityinpicosecondsisderivedfromDividendbeingdividedbytheDivisor.Granularity:2.5ps52h5ps55hByte10MediumTimebase(MTB)Dividend（时间参数编码所用时基的分子）Byte11MediumTimebase(MTB)Divisor（时间参数编码所用时基的分母）Thesebytedefinesavalueinnanosecondsthatrepresentsthefundamentaltimebaseformediumgraintimingcalculations.Thisvalueisusedasamultiplierforformulatingsubsequenttimingparameters.ThetwobyteformstheDividendandtheDivisortodeterminethegranularityofthemediumtimebase.Granularity0.125nsByte1001hByte1108h0.0625nsByte1001hByte110FhByte12MinimumSDRAMCycleTime(tCKmin)（DRAM颗粒最小时钟周期）Thisbytedescribestheminimumcycletimeforthemoduleinmediumtimebase(MTB)units.ForMTBgranularity=0.125ns(Byte10andByte11)DDR3400Mhzclock(800datarate)14hDDR3533Mhzclock(1066datarate)0FhDDR3667Mhzclock(1333datarate)0ChDDR3800Mhzclock(1600datarate)0AhByte13（预留）Reserved00hByte14CASLatenciesSupported,LowByte（支持CL值范围，低位字节）(WhenCSTEZ-SPDProgrammerisused:Simplyselectalllatenciessupportedfromtable.Automaticallycalculatethehiandlowbytehexvaluebaseonbinarynumber)Latency5.6supported06hLatency6supported04hLatency6,7supported0ChLatency5,6,7,8supported1EhByte15CASLatenciesSupported,HighByte00h（支持CL值范围，高位字节）Byte16MinimumCASLatencyTime(tAAmin)（CAS延迟平均时间tAAmin）MinimumCASLatencybasedonmediumtimebase(MTB)units.tAAmincanbereadoffSDRAMdatasheet.Basedonmediumtimebaseof0.125nstAAmin12.5nsDDR3-800D64h15nsDDR3-800E78h11.25nsDDR3-1066E5Ah13.125n