SystemVerilog-Tutorials

SystemVerilogTutorialsThefollowingtutorialswillhelpyoutounderstandsomeofthenewmostimportantfeaturesinSystemVerilog.Theyalsoprovideanumberofcodesamplesandexamples,sothatyoucangetabetter“feel”forthelanguage.ThesetutorialsassumethatyoualreadyknowsomeVerilog.Ifnot,youmightliketolookattheKnowHowVerilogDesigner’sGuidefirst.•Datatypes•RTLdesign•Interfaces•Clocking•Assertion-basedverification•Classes•Testbenchautomationandconstraints•TheDirectProgrammingInterface(DPI)SystemVerilogDataTypesThistutorialdescribesthenewdatatypesthatSystemverilogintroduces.Mostofthesearesynthesisable,andshouldmakeRTLdescriptionseasiertowriteandunderstand.IntegerandRealTypesSystemVerilogintroducesseveralnewdatatypes.ManyofthesewillbefamiliartoCprogrammers.TheideaisthatalgorithmsmodelledinCcanmoreeasiliybeconvertedtoSystemVerilogifthetwolanguageshavethesamedatatypes.Verilog’svariabletypesarefour-state:eachbitis0,1,XorZ.SystemVerilogintroducesnewtwo-statedatatypes,whereeachbitis0or1only.YouwouldusethesewhenyoudonotneedXandZvalues,forexampleintestbenchesandasfor-loopvariables.Usingtwo-statevariablesinRTLmodelsmayenablesimulatorstobemoreefficient.Usedappropriately,theyshouldnotaffectthesynthesisresults.TypeDescriptionExamplebituser-definedsizebit[3:0]a_nibble;byte8bits,unsignedbytea,b;shortint16bits,signedshortintc,d;int32bits,signedinti,j;longint64bits,signedlongintlword;Two-stateintegertypesNotethat,unlikeinC,SystemVerilogspecifiesthenumberofbitsforthefixed-widthtypes.TypeDescriptionExamplereguser-definedsizereg[7:0]a_byte;logicidenticaltoregineverywaylogic[7:0]a_byte;integer32bits,signedintegeri,j,k;Four-stateintegertypeslogicisabetternamethanreg,soispreferred.Asweshallsee,youcanuselogicwhereinthepastyouhavemayhaveusedregorwhereyoumayhaveusedwire.TypeDescriptionExampletime64-bitunsignedtimenow;shortreallikefloatinCshortrealf;reallikedoubleinCdoubleg;realtimeidenticaltorealrealtimenow;Non-integertypesArraysInVerilog-1995,youcoulddefinescalarandvectornetsandvariables.Youcouldalsodefinememoryarrays,whichareone-dimensionalarraysofavariabletype.Verilog-2001allowedmulti-dimensionedarraysofbothnetsandvariables,andremovedsomeoftherestrictionsonmemoryarrayusage.SystemVerilogtakesthisastagefurtherandrefinestheconceptofarraysandpermitsmoreoperationsonarrays.InSystemVerilog,arraysmayhaveeitherpackedorunpackeddimensions,orboth.Considerthisexample:reg[3:0][7:0]register[0:9];Thepackeddimensionsare[3:0]and[7:0].Theunpackeddimensionis[0:9].(Youcanhaveasmanypackedandunpackeddimensionsasyoulike.)Packeddimensions:•areguaranteedtobelaidoutcontiguouslyinmemory•canbecopiedontoanyotherpackedobject•canbesliced(part-selects)•arerestrictedtothebittypes(bit,logic,intetc.),someofwhich(e.g.int)haveafixedsize.Bycontrast,unpackeddimensionscanbearrangedinmemoryinanywaythatthesimulatorchooses.Youcanreliablycopyanarrayontoanotherarrayofthesametype.Forarrayswithdifferenttypes,youmustuseacast,andtherearerulesforhowanunpackedtypeiscasttoapackedtype.Unpackedarrayscanbeanytype,suchasarraysofreals.SystemVerilogpermitsanumberofoperationsoncompleteunpackedarraysandslicesofunpackedarrays.Forthese,thearraysorslicesinvolvedmusthavethesametypeandthesameshape–i.e.exactlythesamenumberandlengthsofunpackeddimensions.Thepackeddimensionsmaybedifferent,aslongasthearrayorsliceelementshavethesamenumberofbits.Thepermittedoperationsare:•Readingandwritingthewholearray•Readingandwritingarrayslices•Readingandwritingarrayelements•Equalityrelationsonarrays,slicesandelementsSystemVerilogalsoincludesdynamicarrays(thenumberofelementsmaychangeduringsimulation)andassociativearrays(whichhaveanon-contiguousrange).Tosupportallthesearraytypes,SystemVerilogincludesanumberofarrayqueryingfunctionsandmethods.Forexample,youcoulduse$dimensionstofindthenumberdimensionsofanarrayvariable.TypedefSystemVerilog’sdatatypesystemallowsyoutodefinequitecomplextypes.Tomakethiskindofcodeclear,thetypedeffacilitywasintroduced.Typedefallowsuserstocreatetheirownnamesfortypedefinitionsthattheywillusefrequentlyintheircode.Typedefscanbeveryconvenientwhenbuildingupcomplicatedarraydefinitions.typedefreg[7:0]octet;octetb;isthesameasreg[7:0]b;andtypedefoctet[3:0]quadOctet;quadOctetqBytes[1:10];isthesameasreg[3:0][7:0]qBytes[1:10];EnumSystemVerilogalsointroducesenumeratedtypes,forexampleenum{circle,ellipse,freeform}c;Enumerationsallowyoutodefineadatatypewhosevalueshavenames.Suchdatatypesareappropriateandusefulforrepresentingstatevalues,opcodesandothersuchnon-numericorsymbolicdata.Typedefiscommonlyusedtogetherwithenum,likethis:typedefenum{circle,ellipse,freeform}ClosedCurve;ClosedCurvec;Thenamedvaluesofanenumerationtypeactlikeconstants.Thedefaulttypeisint.Youcancopythemtoandfromvariablesoftheenumerationtype,comparethemwithoneanotherandsoon.Enumerationsarestronglytyped.Youcan’tcopyanumericvalueintoavariableofenumerationtype,unlessyouuseatype-cast:c=2;//ERRORc=ClosedCurve'(2);//Casting–okayHowever,whenyouuseanenumerationinanexpression,thevalueyouareworkingwithistheliteral’sintegerequivalent;so,forexample,it’sokaytocompareanenumerationvariable