嵌入式系统启动与加载过程(BootLoader)的原理及实现

上海交通大学硕士学位论文嵌入式系统启动与加载过程（BootLoader）的原理及实现姓名：郑进申请学位级别：硕士专业：计算机技术指导教师：张爱新20090201BootLoaderPCPCUSBUSBXLoaderUSBBootLoaderUSBBootLoaderBootloader4AbstractExceptthenormalbootupprocess,Thecorechipsetusuallymayprovideawaytoallowthesystemtocommunicatewithexternaldevices.Thisisanessentialfunctiontofacilitatethedevelopmentprocessandmoreforthemaintenanceworklateron.Actually,Thissocalledsecondbootupprocessismandatoryforversatileprocessorplatform.Mostofthekeyfunctionsduringdevelopmentstageareimplementedbythisway.Thereisnomassflashmemoryburningduringthedevelopmentprocess.Soforanewdevelopboardshouldhavethewaytooperatingtheflashmemoryfreely.Thistimeweneedthissecondbootupprocesstofinishthesefunctions.AndmorewealsocanuseittoimplementsomethinglikeinitializeUSB/Ethernetcardportssoaswecantransportbulkfirmwarefreelyandquickly.IfonlybasedonUARTtransport.Theremustbeoverhoursforonlycoulpeofmegabytestransportation.Thisisreallyunacceptableforreflashingwithhighfrequencyduringthedevelopmentstage.Keywords:EmbeddedSystem,Bootprocedure;(Bootloader)1BootLoader2XloaderBootLoader3ASIC_ID4PORPower-onreset5eROMembeddedROMKNAND6eSRAMembeddedStaticRAMRAMK7NORNORNOR(XIP,eXecuteInPlace),XIP8NANDNAND,,NAND(Bootloader)111.11.1.121PDA1.1.21CPUCPU23PC(Bootloader)24PDA1.1.31ARMMIPSPowerPCMC680023WinCELinuxNucleusSymbian4ManMachineInterface/1.21.2.11-11PC2MultiICETrace32PCJTAGCPU(Bootloader)3PC//USB/3JTAG/UARTeROMeSRAMNANDSDRAM1-1Fig.1-1thedevelopingenvironmentforembeddedsystem1.2.21-2NANDSRAMNORSDR/DDRSDRAMFSMCSDMCJTAGUARTARMPCeROMeSRAM(Bootloader)41-2Fig.1-2thehardwarediagramforatypicalembeddedsystemMPUMPUARMARM7TMDIARM9MPUFLASHRAMROMUSBRS-232RJ-45LCDPCSDRAMSDRAM1-3USBLCDMPURAMROM(Bootloader)51-3Fig.1-3thehardwaremodulesforapplicationprocessor1ARM926Audio/VideoSamrtAcceleratorDSP2DDR/SDRAMControllerSDRAMNAND/NORFLASHCtrleSRAMBuffer16ChannelDMACtrl3GPIOUARTSD/MMCLCDCtrlLCDCameraI/F4JTAG/TraceTimerWatchDog(Bootloader)651.2.31-41-4Fig.1-4thesoftwarediagramforembeddedsystemBSP(BoardSupportPackage)RTOS(RealTimeOperationSystem)BSP(Bootloader)7API1.3BootLoader23BootLoaderBootLoader4XLoader5USBBootLoaderBootLoader(Bootloader)821PC2/PC2.12-12-1Fig.2-1thenormalbootupprocess1ROMXLOADERSDRAMFSMCSDMCARMeROM213(Bootloader)9eROMeROMUARTUARTASIC_IDPC200ms12Xloader(Block0)–NANDXloadereSRAM–NORXloaderNORNORXIP3Xloader4Xloader2XloaderXloaderXloaderSDRAMXloader12SDRAMSDRAM3()4SDRAM563(Bootloader)10BootLoader2.2USB/UART2-22-2Fig.2-2thesecondtimebootupprocessRAMFSMCSDMCARMBooteROMUARTeSRAM123(Bootloader)111ROMeROMBootLoaderUARTASIC_IDPC1UARTeSRAM232eSRAMeSRAMSDRAM1SDRAM(UARTSDRAMeSRAM)2UART/USBUARTUSB3PCSDRAM453SDRAMSDRAM32MB/64MBXloaderBootLoader2.3(Bootloader)12BootLoader(Bootloader)133BootLoader3.1BootLoaderBootLoaderCPUBootLoaderBootLoaderBootLoaderBootLoaderCPUBootLoaderBootLoaderCPUU-BootARMMIPSCPUBootLoaderCPUBootLoaderBootLoaderCPUCPUARM7TDMICPU0x00000000CPU(ROMEEPROM)CPUBootLoader3-1BootLoaderBootLodaer(Bootloader)143-1Fig.3-1thememoryblocklayoutforembeddedsystem3.2NORNANDBootLoaderNORNANDNOR(XIP,eXecuteInPlace)RAMNOR14MBNANDNANDNORNANDNANDNORNANDNORNANDNANDNORSRAMNANDI/ONANDNORNANDBootLoader(Bootloader)15NOR116MBNAND8128MBNORNANDNORNORSDRAM3-2NOR3-2NORFig.3-2ThebootupprocessforNORflashNOR,RAMI/ONANDNANDNANDNANDNAND3-3NANDRAMBootLoader(Bootstrap)RAMNOR(Bootloader)163-3NANDFig.3-3ThebootupprocessforNANDflashBootLoader3.3PC3.3.1WindowsLinux/UnixCPUARM(Bootloader)173-5ARMMIPS3-4Fig.3-4theworkflowforcrosscompileenviroment3.3.2IDEVisualStudio.h(&/Conf.files•makefile•scripts.c,.cpp,.asm(Bootloader)18ARMRealViewDevelopmentSuitMetrowerksCodeWarrior3.4BootLoaderXloaderUSBBootLoaderWinCE(Bootloader)194XLoaderXLoaderNANDXLoaderK0NAND0NAND0eROMeROMBootLoaderNANDNANDeROMNORNAND0eROM40eSRAM14eROMXLoaderBootLoader4-1XLoaderSDRAMNAND(Bootloader)204-1BootLoaderFig.4-1thelayoutofbootloaderforembeddedsystemXLoadereSRAMXLoaderXLoader4.1SDRAMSDRAMeSRAMSDRAMSDRAMXLoaderXLoaderXloaderXLoaderARMeSRAMNANDeROMXLoaderBootloaderXLoaderXLoaderXLoaderXLoader(Bootloader)21t_boot_errorMPMC_Init_XXX_SDRAM(void){.......volatilet_addressp_sdram;/*SDRAM*/t_mpmc_registers*p_mpmc_regs;/*SDRAM*/t_pmu_registers*p_pmu_regs;/*PMU*/p_pmu_regs=(t_pmu_registers*)PMU_REG_START_ADDR;p_mpmc_regs=(t_mpmc_registers*)MPMC_REG_START_ADDR;/**/p_mpmc_regs-DYCR=0x00000000;p_pmu_regs-PMU_CTRL.sdramSelfRefresh=1;/*SDRAMBanks...*/p_mpmc_regs-CR=3;/**/p_mpmc_regs-DYRDCFG=0x1111;/**/p_mpmc_regs-DYCR=0x183;/*CPU100MHZ133MHZ*/p_mpmc_regs-DYREF=1;/*-------------------------------------0x31-100MHZ0x41-133MHZ,-------------------------------------*/p_mpmc_regs-DYREF=0x41;/*133*//**/p_mpmc_regs-DYRP=0x02;p_mpmc_regs-DYRAS=0x05;p_mpmc_regs-DYSREX=0x0B;p_mpmc_regs-DYWR=0x01;p_mpmc_regs-DYRC=0x08;p_mpmc_regs-DYRFC=0x0A;p_mpmc_regs-DYXSR=0x0B;p_mpmc_regs-DYRRD=0x01;p_mpmc_regs-DYMRD=0x01;(Bootloader)22p_mpmc_regs-DYCDLR=0x01;/****SDRAMBank0****/p_mpmc_regs-DYRASCAS0=0x403;p_mpmc_regs-DYCFG0=0x1686;/