Virtex-4-LX开发板原理图

5544332211DDCCBBAA57912LeadSheet2SheetNumberDDRSDRAMVirtex4Banks5-6Virtex4Power8Virtex4Banks1-411EthernetPHYClocksVirtex4Banks7-8144Copyright2004,Avnet,Inc.AllRightsReserved.Thismaterialmaynotbereproduced,distributed,republished,displayed,posted,transmittedorcopiedinanyformorbyanymeanswithoutthepriorwrittenpermissionofAvnet,Inc.AVNETandtheAVlogoareregisteredtrademarksofAvnet,Inc.AlltrademarksandtradenamesarethepropertiesoftheirrespectiveownersandAvnet,Inc.disclaimsanyproprietaryinterestorrightintrademarks,servicemarksandtradenamesotherthanitsown.610Power13Virtex4Banks9-10Function13Virtex-4LXEvauationBoardDDRTermination17AVBusPrimaryPair1516LEDs,Switches,DisplayFLASH,RS232USBAvnetisnotresponsiblefortypographicalorothererrorsoromissionsorfordirect,indirect,incidentalorconsequentialdamagesrelatedtothismaterialorresultingfromitsuse.Avnetmakesnowarrantyorrepresentationrespectingthismaterial,whichisprovidedonanASISbasis.AVNETHEREBYDISCLAIMSALLWARRANTIESORLIABILITYOFANYKINDWITHRESPECTTHERETO,INCLUDING,WITHOUTLIMITATION,REPRESENTATIONSREGARDINGACCURACYANDCOMPLETENESS,ALLIMPLIEDWARRANTIESANDCONDITIONSOFMERCHANTABILITY,SUITABILITYORFITNESSFORAPARTICULARPURPOSE,TITLEAND/ORNON-INFRINGEMENT.Thismaterialisnotdesigned,intendedorauthorizedforuseinmedical,lifesupport,lifesustainingornuclearapplicationsorapplicationsinwhichthefailureoftheproductcouldresultinpersonalinjury,deathorpropertydamage.AnypartyusingorsellingproductsforuseinanysuchapplicationsdosoattheirsoleriskandagreethatAvnetisnotliable,inwholeorinpart,foranyclaimordamagearisingfromsuchuse,andagreetofullyindemnify,defendandholdharmlessAvnetfromandagainstanyandallclaims,damages,loss,cost,expenseorliabilityarisingoutoforinconnectionwiththeuseorperformanceofproductsinsuchapplications.AVBusAuxilliaryAVBusSecondaryPair18ConfigurationJTAGADS-V4-LX-SCHBXilinxVirtex-4LXEvaluationBoardB1Thursday,October07,200418CoverSheetTitleSizeDocumentNumberRevDate:SheetofAvnet,Inc.DesignServicesCopyright20045544332211DDCCBBAASelectMAPConfigurationData[7:0]:-Afterconfiguration,usedforUSBinterface-Configurationsources:-PROMwhenenabledwithajumper-DownloadoverUSBusingConfigurationUtilityFPGABanks1-4ADS-V4-LX-SCHBXilinxVirtex4LXEvaluationBoardB218Thursday,October07,2004TitleSizeDocumentNumberRevDate:SheetofAV_D29AV_CTL15AV_CTL3AV_CTL11AV_D30AV_CTL17AV_CTL8AV_CTL2AV_CTL10AV_CTL18AV_CTL16AV_CTL6AV_CTL0AV_CTL19AV_D31AV_CTL13AV_CTL12AV_CTL14D1D6D2D0D5D4D3D7AV_SEC_IO50AV_SEC_IO49D1D0D3D2D5D4D7D6AV_SEC_IO35AV_SEC_IO32AV_SEC_IO42AV_SEC_IO48AV_SEC_IO41AV_SEC_IO45AV_SEC_IO39AV_SEC_IO44AV_SEC_IO46AV_SEC_IO40AV_SEC_IO43AV_SEC_IO31AV_SEC_IO38AV_SEC_IO37AV_SEC_IO47AV_SEC_IO36AV_CTL2AV_CTL14AV_CTL6AV_CTL12AV_CTL19AV_CTL9AV_CTL13AV_CTL0AV_CTL15AV_CTL17AV_CTL16AV_CTL10AV_CTL4AV_CTL8AV_CTL11AV_CTL18AV_CTL4AV_CTL9AV_D30AV_D31AV_D29AV_SEC_IO38AV_SEC_IO32AV_SEC_IO36AV_SEC_IO31AV_SEC_IO35AV_SEC_IO39AV_SEC_IO37AV_SEC_IO43AV_SEC_IO44AV_SEC_IO40AV_SEC_IO42AV_SEC_IO41AV_SEC_IO46AV_SEC_IO45AV_SEC_IO47AV_SEC_IO48AV_SEC_IO50AV_SEC_IO49D[0:7]11,18RST#11CLK_PLL_REF13USB_FD511,18USB_FD211,18USB_FD611,18USB_FD711,18USB_FD111,18USB_FD011,18USB_FD311,18USB_FD411,18USB_IFCLK11USB_CLKOUT11CLK_100MHz13PLL_LEADLAG13PLL_DLYCTRL13AV_CTL[0:23]3,15,16AV_D[0:31]3,15,16AV_SEC_IO[0:50]3,4,5,17PLL_P113PLL_P213PLL_MULT013PLL_STOP#13PLL_MULT113PLL_P013USB_INT0#11USB_INT1#11CLK_PLL13CLK_PLL#13DDR_CLK_FB5Bank1Bank3Bank2Bank4U1BXC4V_FF668AD13AC13AC15AC16AA11AA12AD14AC14AA13AB13AA15AA16AC11AC12AB14AA14D12E13C16D16D11C11E14D15D13D14F15F16F11F12F13F14B15A12C15B13A16A10B17C13B14A11C14B12A15B10A17C12AF12AE12AC10AB10AB17AC17AF11AF10AE14AE13AE10AD10AD17AD16AD12AD11IO_L8N_D0_LC_2IO_L8P_D1_LC_2IO_L7N_D2_LC_2IO_L7P_D3_LC_2IO_L6N_D4_LC_2IO_L6P_D5_LC_2IO_L5N_D6_LC_2IO_L5P_D7_LC_2IO_L4N_D8_VREF_LC_2IO_L4P_D9_LC_2IO_L3N_D10_LC_2IO_L3P_D11_LC_2IO_L2N_D12_LC_2IO_L2P_D13_LC_2IO_L1N_D14_CC_LC_2IO_L1P_D15_CC_LC_2IO_L8N_D16_CC_LC_1IO_L8P_D17_CC_LC_1IO_L7N_D18_LC_1IO_L7P_D19_LC_1IO_L6N_D20_LC_1IO_L6P_D21_LC_1IO_L5N_D22_LC_1IO_L5P_D23_LC_1IO_L4N_D24_VREF_LC_1IO_L4P_D25_LC_1IO_L3N_D26_LC_1IO_L3P_D27_LC_1IO_L2N_D28_LC_1IO_L2P_D29_LC_1IO_L1N_D30_LC_1IO_L1P_D31_LC_1IO_L1P_GC_CC_LC_3IO_L2P_GC_VRN_LC_3IO_L3P_GC_LC_3IO_L4P_GC_LC_3IO_L5P_GC_LC_3IO_L6P_GC_LC_3IO_L7P_GC_LC_3IO_L8P_GC_LC_3IO_L1N_GC_CC_LC_3IO_L2N_GC_VRP_LC_3IO_L3N_GC_LC_3IO_L4N_GC_VREF_LC_3IO_L5N_GC_LC_3IO_L6N_GC_LC_3IO_L7N_GC_LC_3IO_L8N_GC_LC_3IO_L1P_GC_LC_4IO_L1N_GC_LC_4IO_L2P_GC_LC_4IO_L2N_GC_LC_4IO_L3P_GC_LC_4IO_L3N_GC_LC_4IO_L4P_GC_LC_4IO_L4N_GC_VREF_LC_4IO_L5P_GC_LC_4IO_L5N_GC_LC_4IO_L6P_GC_LC_4IO_L6N_GC_LC_4IO_L7P_GC_VRN_LC_4IO_L7N_GC_VRP_LC_4IO_L8P_GC_CC_LC_4IO_L8N_GC_CC_LC_45544332211DDCCBBAAFPGABanks5/6ForLVDSreceivepairs,install100ohm.ADS-V4-LX-SCHBXilinxVirtex4LXEvaluationBoardB318Thursday,October07,2004TitleSizeDocumentNumberRevDate:SheetofAV_CTL23AV_CTL20AV_CTL22AV_CTL21AV_A2AV_A13AV_A3AV_D2AV_D14AV_A7AV_D23AV_D8AV_D5AV_A14AV_A11AV_A6AV_D1AV_D21AV_D28AV_D12AV_D27AV_A31AV_A12AV_A29AV_D19AV_A4AV_D17AV_CTL1AV_D9AV_A10AV_D24AV_A26AV_A19AV_A28AV_A5AV_D6AV_D13AV_D11AV_D26AV_D22AV_A8AV_D20AV_A18AV_A15