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1122334455667788DDCCBBAATitleNumberRevisionSizeA2Date:2020/10/19SheetofFile:F:\MySheji9\..\Sheet1.SchDocDrawnBy:PA0/WK_UP/TIM2_CH1/TIM2_ETR/TIM5_CH1/TIM8_ETR/U2_CTS/U4_TX/ETH_MII_CRS/ADC123_IN040PA1/TIM2_CH2/TIM5_CH2/U2_RTS/U4_RX/ETH_MII_RX_CLK/ETH_RMII_REF_CLK/ADC123_IN141PA2/TIM2_CH3/TIM5_CH3/TIM9_CH1/U2_TX/ETH_MDIO/ADC123_IN242PA3/TIM2_CH4/TIM5_CH4/TIM9_CH2/U2_RX/OTG_HS_ULPI_D0/ETH_MII_COL/LCD_B5/ADC123_IN347PA4/SPI1_NSS/SPI3_NSS/I2S3_WS/U2_CK/OTG_HS_SOF/DCMI_HSYNC/LCD_VSYNC/ADC12_IN4/DAC_OUT150PA5/TIM2_CH1/TIM2_ETR/TIM8_CH1N/SPI1_SCK/OTG_HS_ULPI_CK/ADC12_IN5/DAC_OUT251PA6/TIM1_BKIN/TIM3_CH1/TIM8_BKIN/SPI1_MISO/TIM13_CH1/DCMI_PIXCLK/LCD_G2/ADC12_IN652PA7/TIM1_CH1N/TIM3_CH2/TIM8_CH1N/SPI1_MOSI/TIM14_CH1/ETH_MII_RX_DV/ETH_RMII_CRS_DV/ADC12_INP53PA8/MCO1/TIM1_CH1/I2C3_SCL/U1_CK/OTG_FS_SOF/LCD_R6119PA9/TIM1_CH2/I2C3_SMBA/U1_TX/DCMI_D0/OTG_FS_VBUS120PA10/TIM1_CH3/U1_RX/OTG_FS_ID/DCMI_D1121PA11/TIM1_CH4/U1_CTS/CAN1_RX/LCD_R4/OTG_FS_DM122PA12/TIM1_ETR/U1_RTS/CAN1_TX/LCD_R5/OTG_FS_DP123PA13/JTMS/SWDIO124PA14/JTCK/SWDCLK137PA15/JTDI/TIM2_CH1/TIM2_ETR/SPI1_NSS/SPI3_NSS/I2S3_WS138PB0/TIM1_CH2N/TIM3_CH3/TIM8_CH2N/LCD_R3/OTG_HS_ULPI_D1/ETH_MII_RXD2/ADC12_IN856PB1/TIM1_CH3N/TIM3_CH4/TIM8_CH3N/LCD_R6/OTG_HS_ULPI_D2/ETH_MII_RXD3/ADC12_IN957PB2/BOOT158PB3/JTDO/TIM2_CH2/SPI1_SCK/SPI3_SCK/I2S3_CK161PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3ext_SD162PB5/TIM3_CH2/I2C1_SMBA/SPI1_MOSI/SPI3_MOSI/I2S3_SD/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/FMC_SDCKE1/DCMI_D10163PB6/TIM4_CH1/I2C1_SCL/U1_TX/CAN2_TX/FMC_SDNE1/DCMI_D5164PB7/TIM4_CH2/I2C1_SDA/U1_RX/FMC_NL/DCMI_VSYNC165PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/ETH_MII_TXD3/SDIO_D4/DCMI_D6/LCD_B6167PB9/TIM4_CH4/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/CAN1_TX/SDIO_D5/DCMI_D7/LCD_B7168PB10/TIM2_CH3/I2C2_SCL/SPI2_SCK/I2S2_CK/U3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/LCD_G479PB11/TIM2_CH4/I2C2_SDA/U3_RX/OTG_HS_ULPI_D4/ETH_MII_TX_EN/ETH_RMII_TX_EN/LCD_G580PB12/TIM1_BKIN/I2C2_SMBA/SPI2_NSS/I2S2_WS/U3_CK/CAN2_RX/OTG_HS_ULPI_D5/ETH_MII_TXD0/ETH_RMII_TXD0/OTG_HS_ID92PB13/TIM1_CH1N/SPI2_SCK/I2S2_CK/U3_CTS/CAN2_TX/OTG_HS_ULPI_D6/ETH_MII_TXD1/ETH_RMII_TXD1/OTG_HS_VBUS93PB14/TIM1_CH2N/TIM8_CH2N/SPI2_MISO/I2S2ext_SD/U3_RTS/TIM12_CH1/OTG_HS_DM94PB15/RTC_REFIN/TIM1_CH3N/TIM8_CH3N/SPI2_MOSI/I2S2_SD/TIM12_CH2/OTG_HS_DP95PC0/OTG_HS_ULPI_STP/FMC_SDNWE/ADC123_IN1032PC1/ETH_MDC/ADC123_IN1133PC2/SPI2_MISO/I2S2ext_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/FMC_SDNE0/ADC123_IN1234PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/FMC_SDCKE0/ADC123_IN1335PC4/ETH_MII_RXD0/ETH_RMII_RXD0/ADC12_IN1454PC5/ETH_MII_RXD1/ETH_RMII_RXD1/ADC12_IN1555PC6/TIM3_CH1/TIM8_CH1/I2S2_MCK/U6_TX/SDIO_D6/DCMI_D0/LCD_HSYNC115PC7/TIM3_CH2/TIM8_CH2/I2S3_MCK/U6_RX/SDIO_D7/DCMI_D1/LCD_G6116PC8/TIM3_CH3/TIM8_CH3/U6_CK/SDIO_D0/DCMI_D2117PC9/MCO2/TIM3_CH4/TIM8_CH4/I2C3_SDA/I2S_CKIN/SDIO_D1/DCMI_D3118PC10/SPI3_SCK/I2S3_CK/U3_TX/U4_TX/SDIO_D2/DCMI_D8/LCD_R2139PC11/I2S3ext_SD/SPI3_MISO/U3_RX/U4_RX/SDIO_D3/DCMI_D4140PC12/SPI3_MOSI/I2S3_SD/U3_CK/U5_TX/SDIO_CK/DCMI_D9141PC13/TAMP_18PC14/OSC32_IN9PC15/OSC32_OUT10PD0/CAN1_RX/FMC_D2142PD1/CAN1_TX/FMC_D3143PD2/TIM3_ETR/U5_RX/SDIO_CMD/DCMI_D11144PD3/SPI2_SCK/I2S2_CK/U2_CTS/FMC_CLK/DCMI_D5/LCD_G7145PD4/U2_RTS/FMC_NOE146PD5/U2_TX/FMC_NWE147PD6/SPI3_MOSI/I2S3_SD/SAI1_SD_A/U2_RX/FMC_NWAIT/DCMI_D10/LCD_B2150PD7/U2_CK/FMC_NE1/FMC_NCE2151PD8/U3_TX/FMC_D1396PD9/U3_RX/FMC_D1497PD10/U3_CK/FMC_D15/LCD_B398PD11/U3_CTS/FMC_A1699PD12/TIM4_CH1/U3_RTS/FMC_A17100PD13/TIM4_CH2/FMC_A18101PD14/TIM4_CH3/FMC_D0104PD15/TIM4_CH4/FMC_D1105PE0/TIM4_ETR/U8_RX/FMC_NBL0/DCMI_D2169PE1/U8_TX/FMC_NBL1/DCMI_D3170PE2/SPI4_SCK/SAI1_MCLK_A/ETH_MII_TXD3/FMC_A231PE3/SAI1_SD_B/FMC_A192PE4/SPI4_NSS/SAI1_FS_A/FMC_A20/DCMI_D4/LCD_B03PE5/TIM9_CH1/SPI4_MISO/SAI1_SCK_A/FMC_A21/DCMI_D6/LCD_G04PE6/TIM9_CH2/SPI4_MOSI/SAI1_SD_A/FMC_A22/DCMI_D7/LCD_G15PE7/TIM1_ETR/U7_RX/FMC_D468PE8/TIM1_CH1N/U7_TX/FMC_D569PE9/TIM1_CH1/FMC_D670PE10/TIM1_CH2N/FMC_D773PE11/TIM1_CH2/SPI4_NSS/FMC_D8/LCD_G374PE12/TIM1_CH3N/SPI4_SCK/FMC_D9/LCD_B475PE13/TIM1_CH3/SPI4_MISO/FMC_D10/LCD_DE76PE14/TIM1_CH4/SPI4_MOSI/FMC_D11/LCD_CLK77PE15/TIM1_BKIN/FMC_D12/LCD_R778VSS158VSS148VSS135VSS126VSS113VSS102VSS90VSS71VSS61VSS22VSS14VDD172VDD159VDD149VDD136VDD127VDD114VDD103VDD91VDD82VDD72VDD62VDD49VDD36VDD23VDD15NRST31PF0/I2C2_SDA/FMC_A016PF1/I2C2_SCL/FMC_A117PF2/I2C2_SMBA/FMC_A218PF3/FMC_A3/ADC3_IN919PF4/FMC_A4/ADC3_IN1420PF5/FMC_A5/ADC3_IN1521PF6/TIM10_CH1/SPI5_NSS/SAI1_SD_B/U7_RX/FMC_NIORD/ADC3_IN424PF7/TIM11_CH1/SPI5_SCK/SAI1_MCLK_B/U7_TX/FMC_NREG/ADC3_IN525PF8/TIM13_CH1/SPI5_MISO/SAI1_SCK_B/FMC_NIOWR/ADC3_IN626PF9/TIM14_CH1/SPI5_MOSI/SAI1_FS_B/FMC_CD/ADC3_IN727PF10/FMC_INTR/DCMI_D11/LCD_DE/ADC3_IN828PF11/SPI5_MOSI/FMC_SDNRAS/DCMI_D1259PF12/FMC_A660PF13/FMC_A763PF14/FMC_A864PF15/FMC_A965BOOT0166BYPASS_REG48VBAT6VREF+38VCAP_181VCAP_2125VDDA39VSSA37PDR_ON171PG0/FMC_A1066PG1/FMC_A1167PG2/FMC_A12106PG3/FMC_A13107PG4/FMC_A14/FMC_BA0108PG5/FMC_A15/FMC_BA1109PG6/FMC_INT2/DCMI_D12/LCD_R7110PG7/U6_CK/FMC_INT3/DCMI_D13/LCD_CLK111PG8/SPI6_NSS/U6_RTS/ETH_PPS_OUT/FMC_SDCLK112PG9/U6_RX/FMC_NE2/FMC_NCE3152PG10/LCD_G3/FM
本文标题:STM32F429IGT6开发板原理图
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