面向电子控制器测试的JTAG控制器IP软核设计

26120111JournalofAerospacePowerVol.26No.1Jan.2011:10008055(2011)01023407JTAGIP杨聖魁1,张天宏1,邓志伟1,2(1.,210016;2.,214063):(FPGA)JTAG(jointtestactiongroup)(IP),.(TAP),(DSP),JTAGIPIP,.IP,..:;;;;:V2337:A:20091130;:20100831:聖魁(1985-),男,甘肃定西人,硕士生,研究方向为航空发动机电子控制器及机内测试(BIT)技术.DesignoftheIPsoftcoreofJTAGcontrollerforelectronicenginecontrollerYANGShengkui1,ZHANGTianhong1,DENGZhiwei1,2(1.CollegeofEnergyandPowerEngineering,NanjingUniversityofAeronauticsandAstronautics,Nanjing210016,China;2.AviationMotorControlSystemInstitute,AviationIndustryCorporationofChina,Wuxi214063,China)Abstract:Itisfeasibletorealizeonlinetestbydesigninganintellectualproperty(IP)softcoreofJTAG(jointtestactiongroup)controllerwhichisbasedonfiledprogrammablegatearray(FPGA).Throughanalyzingthestatemachineoftestaccessport(TAP)controllerandtheprincipleofsomeapplicationspecificintegratedcircuit(ASIC)forboundaryscancontroller,theIPsoftcoreofJTAGcontrollerwasdesignedfordigitalsignalprocess(DSP)whichwasusedinanelectronicenginecontroller(EEC).Meanwhilethehardwareoftestingandverificationsystemforboundaryscanwasdesigned,andthetestsofmaininstructionswerecompleted.ThisIPsoftcore,whichcanbeusedinmanyfieldssuchasscantestandfaultinjection,canloadthescanvectorflexiblytorealizeonlinetest.Keywords:electronicenginecontroller(EEC);boundaryscan;builtintest(BIT);fieldprogrammablegatearray(FPGA);intellectualproperty(IP)softcore(EEC)(FADEC),FADEC.,EEC1聖魁等:面向电子控制器测试的JTAG控制器IP软核设计,,[12].,JTAG(jointtestactiongroup),,.[35].ASIC(applicationspecificintegratedcircuit),,,.,EECJTAG.FPGA(fieldprogrammablegatearray),,,[69].,HispanoSuizaFADECFPGA.,FPGAJTAGIP(intellectualproperty),,,.FPGAEECDSP(digitalsignalprocess)TMS320F2812JTAGIP,,.,,.2EECIntel386MPC5554,JTAGIP.1IEEE1149.1[5].,,[46].EEC486,DSP,FPGAPowerPC,,[6].,EEC,,.BSDL(boundaryscandatasheetlanguage),I/O(input/output).,,,;,[5].1.,.,,[1011].1Fig.1BoundaryscanchainofEEC2JTAGIP,,5000.JTAGIPVerilogHDL.(TAP),JTAG,.2.1TAPJTAGTAP,23526.TAP5,:TCK;TMS;TDI;TDO;TRST.2,TAP6:/2TAPFig.2StatemachineforTAPcontroller..TMSTDITCK,TDOTCK.,TMS5TCK,.,TAP,.TCKTMS,,.,TMSTCK,TAP,,.2.2IPJTAGIP.:always.,,,.JTAG:()JTAG.,,,TMS,.,USB().3JTAGIP,JTAG.2361聖魁等:面向电子控制器测试的JTAG控制器IP软核设计,.:TMS_sourceTDO_sourceTDI_sourceTIOILengthDLengthTMSLengthTLength..JTAGTCK,TMS,TDO,TDI,TRST..TMS320F2812,EMU0,EMU1[1213].3IPFig.3BlockofthefunctionoftheIPsoftcore4JTAGIP,TDITDO.,TDO,TDI,xxxx_1111_1111_1111_1111,TDO.,,.4Fig.4WaveofthepresynthesisJTAGIPTCK.,TDOTDITCK.5,TDOTCK,TDI,,.JTAG,TMS,.TMS.5JTAGFig.5BlockoftimingforJTAGstatemachineTMS320F2812(BSDL),,:TESTSEL=0EMU1=0EMU0=1TRSTN=01(01)TMS320F2812FLASH,:TESTSEL=0EMU1=0EMU0=0TRSTN=0TMS320F2812,JTAGIPEMU0,EMU1,,.EMU0,EMU10,TMS320F2812.3JTAG,.6,JTAG.ACTELFusionFPGAAFS600JTAG.TIDSPTMS320F2812,.JTAGEMU0,EMU123726TMS320F2812,,.TMS320F2812BSDL,,EMU0,EMU1,TESTSEL.6Fig.6BlockofthetestingsystemforboundaryscanTMS320F2812[13]:BYPASS,IDCODE,EXTEST,SAMPLE.JTAGTMS320F2812,,,JTAG.4JTAGIP4.1BYPASS7BYPASS.111,32,TMS320F2812001,,.0,,.7Fig.7WavesofthetestingforBYPASS4.2IDCODE8IDCODE.100,32,TMS320F2812001,1_11101000000_0010111100101101_1000,,,.8Fig.8WavesofthetestingforIDCODE4.3EXTEST9EXTEST..000,237,TMS320F2812.(LED),..,,0,.,control49116,0,control1.Output39()Fig.9WavesofthetestingforEXTEST(corearea)2381聖魁等:面向电子控制器测试的JTAG控制器IP软核设计0((O/Z)1).Input,,output31input1,0.4.4SAMPLE10SAMPLE.001,237.,,inputoutput3,,.Control.1.Num,TMS320F2812237,0,236,0TDO.10()Fig.10WavesofthetestingforSAMPLE(corearea)1Table1DataofcoreareaforEXTESTandSAMPLENumNameFunctionEXTEST_inEXTEST_outSAMPLE_inSAMPLE_out56PWM8output3000057control010058PWM9input101159PWM9output3000160control010061PWM10input111162PWM10output3101163control010064PWM11input101065PWM11output3000066control010067PWM12input111068PWM12output3101069control010070XRnWoutput3111171T3PWM_T3CMPinput10115,BIT(builtintest).,,,.FPGA,.FPGAJTAGIP,,,.,IP,,,.JTAGIP,23926TDOTDI.TDOTCK,TDI,,.IPBIT,.:[1],,.FADECBIT[J].,2006,21(3):581587.QINHaibo,ZHANGTianhong,SUNJianguo.StudyoncomprehensivefaultinjectorforBITverificationoftheFADECsystem[J].JournalofAerospacePower,2006,21(3):581587.(inChinese)[2],,,.DSPCAN[J].,2005,20(1):130135.ZHANGTianhong,MOULuyong,DINGYi,etal.Studyofanengineelectroniccontroller!scorecircuitmodulebasedonDSPandCAN[J].JournalofAerospacePower,2005,20(1):130135.(inChinese)[3].[M].:,1995.[4],,,.[M].:,2002.[5]IEEE.IEEEStandard1149.12001Thetestaccessportandboundaryscanarchitecture[S].LosAlamitos,CA,USA:IEEEComputerSocietyPress,2001.[6],.BS[J].,2005,30(12):3841.WANGNing,DONGBing.ThetestanddiagnosistechniquesofpartBSboardbasedonboundaryscan[J].SemiconductorTechnology,2005,30(12):3841.(inChinese)[7]ClarkCJ,RicchettiM.AcodelessBISTprocessorforembeddedtestandinsystemconfigurationofboardsandsystems[C]∀ProceedingsoftheInternationalTestConferenceonInternationalTestConference.Washington,DC,USA:IEEEComputerSociety,2004:857866.[8]BhavsarD.SynchronizingtheIEEE1149.1Testaccessportforchipleveltestability[J].IEEEDesignandTestofComputer,2000,17(2):9499.[9]PomeranzI,ReddySM.Apartitioningandstoragebasedbuiltintestpatterngenerationmethodforscancirc