ATMEGA16A-AU中文资料

Features•High-performance,Low-powerAVR®8-bitMicrocontroller�AdvancedRISCArchitecture–131PowerfulInstructions–MostSingle-clockCycleExecution–32x8GeneralPurposeWorkingRegisters–FullyStaticOperation–Upto16MIPSThroughputat16MHz–On-chip2-cycleMultiplier�HighEnduranceNon-volatileMemorysegments–16KBytesofIn-SystemSelf-programmableFlashprogrammemory–512BytesEEPROM–1KByteInternalSRAM–Write/EraseCycles:10,000Flash/100,000EEPROM–Dataretention:20yearsat85°C/100yearsat25°C(1)–OptionalBootCodeSectionwithIndependentLockBits�In-SystemProgrammingbyOn-chipBootProgram�TrueRead-While-WriteOperation–ProgrammingLockforSoftwareSecurity�JTAG(IEEEstd.1149.1Compliant)Interface–Boundary-scanCapabilitiesAccordingtotheJTAGStandard–ExtensiveOn-chipDebugSupport–ProgrammingofFlash,EEPROM,Fuses,andLockBitsthroughtheJTAGInterface�PeripheralFeatures–Two8-bitTimer/CounterswithSeparatePrescalersandCompareModes–One16-bitTimer/CounterwithSeparatePrescaler,CompareMode,andCaptureMode–RealTimeCounterwithSeparateOscillator–FourPWMChannels–8-channel,10-bitADC�8Single-endedChannels�7DifferentialChannelsinTQFPPackageOnly�2DifferentialChannelswithProgrammableGainat1x,10x,or200x–Byte-orientedTwo-wireSerialInterface–ProgrammableSerialUSART–Master/SlaveSPISerialInterface–ProgrammableWatchdogTimerwithSeparateOn-chipOscillator–On-chipAnalogComparator�SpecialMicrocontrollerFeatures–Power-onResetandProgrammableBrown-outDetection–InternalCalibratedRCOscillator–ExternalandInternalInterruptSources–SixSleepModes:Idle,ADCNoiseReduction,Power-save,Power-down,StandbyandExtendedStandby�I/OandPackages–32ProgrammableI/OLines–40-pinPDIP,44-leadTQFP,and44-padQFN/MLF�OperatingVoltages–2.7-5.5VforATmega16A�SpeedGrades–0-16MHzforATmega16A�PowerConsumption@1MHz,3V,and25°CforATmega16A–Active:0.6mA–IdleMode:0.2mA–Power-downMode:1µA8-bitMicrocontrollerwith16KBytesIn-SystemProgrammableFlashATmega16ASummary28154AS–AVR–06/08ATmega16A1.PinConfigurationsFigure1-1.PinoutATmega16A(XCK/T0)PB0(T1)PB1(INT2/AIN0)PB2(OC0/AIN1)PB3(SS)PB4(MOSI)PB5(MISO)PB6(SCK)PB7RESETVCCGNDXTAL2XTAL1(RXD)PD0(TXD)PD1(INT0)PD2(INT1)PD3(OC1B)PD4(OC1A)PD5(ICP1)PD6PA0(ADC0)PA1(ADC1)PA2(ADC2)PA3(ADC3)PA4(ADC4)PA5(ADC5)PA6(ADC6)PA7(ADC7)AREFGNDAVCCPC7(TOSC2)PC6(TOSC1)PC5(TDI)PC4(TDO)PC3(TMS)PC2(TCK)PC1(SDA)PC0(SCL)PD7(OC2)PA4(ADC4)PA5(ADC5)PA6(ADC6)PA7(ADC7)AREFGNDAVCCPC7(TOSC2)PC6(TOSC1)PC5(TDI)PC4(TDO)(MOSI)PB5(MISO)PB6(SCK)PB7RESETVCCGNDXTAL2XTAL1(RXD)PD0(TXD)PD1(INT0)PD2(INT1)PD3(OC1B)PD4(OC1A)PD5(ICP1)PD6(OC2)PD7VCCGND(SCL)PC0(SDA)PC1(TCK)PC2(TMS)PC3PB4(SS)PB3(AIN1/OC0)PB2(AIN0/INT2)PB1(T1)PB0(XCK/T0)GNDVCCPA0(ADC0)PA1(ADC1)PA2(ADC2)PA3(ADC3)PDIPTQFP/QFN/MLFNOTE:Bottompadshouldbesolderedtoground.38154AS–AVR–06/08ATmega16A2.OverviewTheATmega16Aisalow-powerCMOS8-bitmicrocontrollerbasedontheAVRenhancedRISCarchitecture.Byexecutingpowerfulinstructionsinasingleclockcycle,theATmega16Aachievesthroughputsapproaching1MIPSperMHzallowingthesystemdesignertooptimizepowerconsumptionversusprocessingspeed.48154AS–AVR–06/08ATmega16A2.1BlockDiagramFigure2-1.BlockDiagramINTERNALOSCILLATOROSCILLATORWATCHDOGTIMERMCUCTRL.&TIMINGOSCILLATORTIMERS/COUNTERSINTERRUPTUNITSTACKPOINTEREEPROMSRAMSTATUSREGISTERUSARTPROGRAMCOUNTERPROGRAMFLASHINSTRUCTIONREGISTERINSTRUCTIONDECODERPROGRAMMINGLOGICSPIADCINTERFACECOMP.INTERFACEPORTADRIVERS/BUFFERSPORTADIGITALINTERFACEGENERALPURPOSEREGISTERSXYZALU+-PORTCDRIVERS/BUFFERSPORTCDIGITALINTERFACEPORTBDIGITALINTERFACEPORTBDRIVERS/BUFFERSPORTDDIGITALINTERFACEPORTDDRIVERS/BUFFERSXTAL1XTAL2RESETCONTROLLINESVCCGNDMUX&ADCAREFPA0-PA7PC0-PC7PD0-PD7PB0-PB7AVRCPUTWIAVCCINTERNALCALIBRATEDOSCILLATOR58154AS–AVR–06/08ATmega16ATheAVRcorecombinesarichinstructionsetwith32generalpurposeworkingregisters.Allthe32registersaredirectlyconnectedtotheArithmeticLogicUnit(ALU),allowingtwoindependentregisterstobeaccessedinonesingleinstructionexecutedinoneclockcycle.Theresultingarchitectureismorecodeefficientwhileachievingthroughputsuptotentimesfasterthancon-ventionalCISCmicrocontrollers.TheATmega16Aprovidesthefollowingfeatures:16KbytesofIn-SystemProgrammableFlashProgrammemorywithRead-While-Writecapabilities,512bytesEEPROM,1KbyteSRAM,32generalpurposeI/Olines,32generalpurposeworkingregisters,aJTAGinterfaceforBoundary-scan,On-chipDebuggingsupportandprogramming,threeflexibleTimer/Counterswithcom-paremodes,InternalandExternalInterrupts,aserialprogrammableUSART,abyteorientedTwo-wireSerialInterface,an8-channel,10-bitADCwithoptionaldifferentialinputstagewithprogrammablegain(TQFPpackageonly),aprogrammableWatchdogTimerwithInternalOscil-lator,anSPIserialport,andsixsoftwareselectablepowersavingmodes.TheIdlemodestopstheCPUwhileallowingtheUSART,Two-wireinterface,A/DConverter,SRAM,Timer/Counters,SPIport,andinterruptsystemtocontinuefunctioning.ThePower-downmodesavestheregistercontentsbutfreezestheOscillator,disablingallotherchipfunctionsuntilthenextExternalInter-ruptorHardwareReset.InPower-savemode,theAsynchronousTimercontinuestorun,allowingtheusertomaintainatimerbasewhiletherestofthedeviceissleeping.TheADCNoiseReductionmodestopstheCPUandallI/Omodu