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TMFreescale,theFreescalelogo,CodeWarrior,ColdFireandPowerquiccaretrademarksofFreescaleSemiconductor,Inc.,Reg.U.S.Pat.&Tm.Off.Flexis,ProcessorExpertandQorIQaretrademarksofFreescaleSemiconductor,Inc.Allotherproductorservicenamesarethepropertyoftheirrespectiveowners.ThePowerArchitectureandPower.orgwordmarksandthePowerandPower.orglogosandrelatedmarksaretrademarksandservicemarkslicensedbyPower.org.ARMistheregisteredtrademarkofARMLimited.ARMCortex-M4andARMCortex-M3aretrademarksofARMLimited.©2010FreescaleSemiconductor,Inc.1KinetisTechnicalOverview-analogMixed-signalanalog:.1.2V40ppm/CPrecisionVoltagereference.12-bitDAC.HSCMPwith6-bitinternalreferenceAgendaTMFreescale,theFreescalelogo,AltiVec,C-5,CodeTEST,CodeWarrior,ColdFire,C-Ware,mobileGT,PowerQUICC,StarCore,andSymphonyaretrademarksofFreescaleSemiconductor,Inc.,Reg.U.S.Pat.&Tm.Off.BeeKit,BeeStack,CoreNet,theEnergyEfficientSolutionslogo,Flexis,MXC,PlatforminaPackage,ProcessorExpert,QorIQ,QUICCEngine,SMARTMOS,TurboLinkandVortiQaaretrademarksofFreescaleSemiconductor,Inc.Allotherproductorservicenamesarethepropertyoftheirrespectiveowners.©2010FreescaleSemiconductor,Inc.2.HSCMPwith6-bitinternalreference.16-bitfastADCw/PGAplusOPA.Sequencegenerator–PDBTMFreescale,theFreescalelogo,AltiVec,C-5,CodeTEST,CodeWarrior,ColdFire,C-Ware,mobileGT,PowerQUICC,StarCore,andSymphonyaretrademarksofFreescaleSemiconductor,Inc.,Reg.U.S.Pat.&Tm.Off.BeeKit,BeeStack,CoreNet,theEnergyEfficientSolutionslogo,Flexis,MXC,PlatforminaPackage,ProcessorExpert,QorIQ,QUICCEngine,SMARTMOS,TurboLinkandVortiQaaretrademarksofFreescaleSemiconductor,Inc.Allotherproductorservicenamesarethepropertyoftheirrespectiveowners.©2010FreescaleSemiconductor,Inc.VoltageReferenceProgrammableVoltageReference(VREF)►Features•1.2VOutput•Trimmable•HighPowermodeforexternaluse•40ppm/ºCincludedtemperaturevariationcompensationindesignIntotal-40-105Ctemprange►KeyPointsTMFreescale,theFreescalelogo,AltiVec,C-5,CodeTEST,CodeWarrior,ColdFire,C-Ware,mobileGT,PowerQUICC,StarCore,andSymphonyaretrademarksofFreescaleSemiconductor,Inc.,Reg.U.S.Pat.&Tm.Off.BeeKit,BeeStack,CoreNet,theEnergyEfficientSolutionslogo,Flexis,MXC,PlatforminaPackage,ProcessorExpert,QorIQ,QUICCEngine,SMARTMOS,TurboLinkandVortiQaaretrademarksofFreescaleSemiconductor,Inc.Allotherproductorservicenamesarethepropertyoftheirrespectiveowners.©2010FreescaleSemiconductor,Inc.4►KeyPoints•UseVREFonDACfordynamicbiasing•UseVREFindependentlyforstaticbiasing•UseVREFtoreferenceADCformaximumADCresolution•LowpowermodecouldsaveruncurrentVREFblockdiagramTMFreescale,theFreescalelogo,AltiVec,C-5,CodeTEST,CodeWarrior,ColdFire,C-Ware,mobileGT,PowerQUICC,StarCore,andSymphonyaretrademarksofFreescaleSemiconductor,Inc.,Reg.U.S.Pat.&Tm.Off.BeeKit,BeeStack,CoreNet,theEnergyEfficientSolutionslogo,Flexis,MXC,PlatforminaPackage,ProcessorExpert,QorIQ,QUICCEngine,SMARTMOS,TurboLinkandVortiQaaretrademarksofFreescaleSemiconductor,Inc.Allotherproductorservicenamesarethepropertyoftheirrespectiveowners.©2010FreescaleSemiconductor,Inc.5ADC_Vrefh,DAC,CMPModeofOperationMustdisconnectthecap.TMFreescale,theFreescalelogo,AltiVec,C-5,CodeTEST,CodeWarrior,ColdFire,C-Ware,mobileGT,PowerQUICC,StarCore,andSymphonyaretrademarksofFreescaleSemiconductor,Inc.,Reg.U.S.Pat.&Tm.Off.BeeKit,BeeStack,CoreNet,theEnergyEfficientSolutionslogo,Flexis,MXC,PlatforminaPackage,ProcessorExpert,QorIQ,QUICCEngine,SMARTMOS,TurboLinkandVortiQaaretrademarksofFreescaleSemiconductor,Inc.Allotherproductorservicenamesarethepropertyoftheirrespectiveowners.©2010FreescaleSemiconductor,Inc.6witha100nFcapacitorandhasamaximum1.1mAdrivestrength.12-bitDACTMFreescale,theFreescalelogo,AltiVec,C-5,CodeTEST,CodeWarrior,ColdFire,C-Ware,mobileGT,PowerQUICC,StarCore,andSymphonyaretrademarksofFreescaleSemiconductor,Inc.,Reg.U.S.Pat.&Tm.Off.BeeKit,BeeStack,CoreNet,theEnergyEfficientSolutionslogo,Flexis,MXC,PlatforminaPackage,ProcessorExpert,QorIQ,QUICCEngine,SMARTMOS,TurboLinkandVortiQaaretrademarksofFreescaleSemiconductor,Inc.Allotherproductorservicenamesarethepropertyoftheirrespectiveowners.©2010FreescaleSemiconductor,Inc.712-bitDACTwovoltagereferences1)Vext-VDDA2)Vint-VREFH(ifVREFOisusedasADCTMFreescale,theFreescalelogo,AltiVec,C-5,CodeTEST,CodeWarrior,ColdFire,C-Ware,mobileGT,PowerQUICC,StarCore,andSymphonyaretrademarksofFreescaleSemiconductor,Inc.,Reg.U.S.Pat.&Tm.Off.BeeKit,BeeStack,CoreNet,theEnergyEfficientSolutionslogo,Flexis,MXC,PlatforminaPackage,ProcessorExpert,QorIQ,QUICCEngine,SMARTMOS,TurboLinkandVortiQaaretrademarksofFreescaleSemiconductor,Inc.Allotherproductorservicenamesarethepropertyoftheirrespectiveowners.©2010FreescaleSemiconductor,Inc.8(ifVREFOisusedasADCReference,Vintwillbe1.2V)Sequenceofregistersetup►GenericDACinitializationsequence:1.Enableclockgatingto:a.DACb.VREF,ifselectedbyDACusedasaninternalreferencec.DMAifdatatransfersarerequiredinlieuofinterrupts2.SelectinputreferencevoltagetoeitherVREForVDDA.3.ConfigureVREFmoduletooutputvoltage,ifDACselectsVREFasreferencevoltage.4.ConfigurePDBPulseOutputfordesiredtriggeringwindow/periodifnecessar
本文标题:飞思卡尔Kinetis技术模拟部分培训资料
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