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3.16利用记录类型定义的一个微处理器命令信息表。TYPEREGNAMEIS(AX,BX,CX,DX);)TYPEOPERATIONISRECORDOPSTR:STRING(1TO10);OPCODE:BIT_VECTOR(3DowNTO0));OP1,OP2,RES:REGNAME;ENDRECORDOPERATION;VARIABLEINSTR1,INSTR2:OPERATION::INSTR1:=(ADDAX,BX,”0001,AX,BX,AX);INSTR2:=(ADDAX,BX”,”0010,OTHERS=BX);VARIABLEINSTR3:OPERATION;:INSTR3.OPSTR:=MULAX,BX;INSTR3.OP1:=AX;3.17类型转换函数方式LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;LIBRARYDATAIO;USEDATAIO.STD_LOGIC_OPS.ALL;ENTITYCNT4ISPORT(CLK:INSTDLOGIC;P:INOUTSTDLOGIC_VECTOR(3DOWNTOO));ENDENTITYCNT4;ARCHITECTUREARTOFCNT4ISBEGINPROCESS(CLK)ISBEGINIFCLK='1'ANDCLK'EVENTTHENp=TO_VECTOR(2,TO_INTEGER(P)+1);ENDIF;ENDPROCESS;ENDARCHITECTUREART;3.20信号与变量赋值示例SIGNALS1,S2:STD_LOGIC;SIGNALSVEC:STD_LOGIC_VECTOR(0TO7);:PROCESS(S1,S2)ISVARIABLEV1,V2:STD_LOGIC;BEGINV1:=’1’;V2:=’1’;S1=’1’;S2=’1’;SVEC(0)=V1;SVEC(1)=V2;SVEC(2)=S1;SVEC(3)=S2;V1:=’0’;V2:=’0’;S2:=’0’;SVEC(4)=V1;SVEC(5)=V2;SVEC(6)=S1;SVEC(7)=S2;ENDPROCESS;3.22对元素赋值示例。SIGNALA,B,C,D:STD_LOGIC;SIGNALS:STD_LOGIC_VECTOR(1T04);:VARIABLEE,F:STD_LOGIC;VARIABLEG:STD_LOGIC_VECTOR(1T02);VARIABLEH:STD_LOGIC_VECTOR(1T04);S=(’0‘,’1’,’0',’0’);(A,B,C,D)=S;--位置关联方式赋值:--其他语句(3=E,4=F,2=G(1),1=G(2)):=H;--名字关联方式赋值示例中的信号赋值语句属位置关联赋值方式,其赋值结果等效于:A=’O’;B=’1’;C=’0’;D=’0’;示例中的变量赋值语句属名字关联赋值方式,赋值结果等效于:G(2):=H(1);G(1):=H(2);E:=H(3);F:=H(4);3.23选择器LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYEXAMPLEISPORT(A,B,C:INBOOLEAN;Y:OUTBOOLEAN);ENDENTITYEXAMPLE;ARCHITECTUREARTOFEXAMPLEISBEGINPROCESS(A,B,C)ISVARIABLEN:BOOLEAN;BEGINIFATHENN:=B;ELSEN:=C;ENDIF;Y=N;ENDPROCESS;ENDARCHITEcTUREART;3.25用CASE语句描述4选1多路信号选择器LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYMUX4IAISPORT(SI,S2:INSTD_LOGIC;A,B,C,D:INSTD_LOGIC;Z:OUTSTD_LOGIC);ENDENTITYMUX4IA;ARCHITECTUREARTOFMUX4IAISSIGNALS:STD_LOGIC_VECTOR(1DOWNTOO);BEGINS=S1&S2;PROCESS(S,A,B,C,D)ISBEGINCASESISWHEN00=Z=A;WHEN01=Z=B;WHEN10=Z=C;WHEN11=Z=D;WHENOTHERS=Z='X';ENDCASE;ENDPROCESS;ENDARCHITECTUREART;3.30两元素位矢量值比较器。SIGNALA,B:STD_LOGIC_VECTOR(1DOWNTO0):SIGNALA_LESS_B:BOOLEAN;:A_LESS_B=FLASE;--设初始值FORIIN1DOWNT00LOOPIF(A(I)=’l'ANDB(I)='O')THENA_LESS_B=FALSE;EXIT;ELSIF(A(I)=‘0'ANDB(I)='1')THENA_LESS_B=TRUE;--ABEXIT;ELSENULL;ENDIF;ENDLOOP;3.43十进制加法计数器之一LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;一打开重载程序包ENTITYCNT10AISPORT(CLR:INSTD_LOGIC;DIN:INSTD_LOGIC_VECTOR(3DOWNT00);CNT:OUTSTD_LOGIC_VECTOR(3DOWNTO0));ENDENTITYCNT10A;ARCHITECTUREARTOFCNT10AISBEGINPROCESS(DIN,CLR)ISBEGINIF(CLR=‘1'ORDIN=1001)THENCNT=OOOO”;ELSECNT=DIN+1;.ENDIF;ENDPROCESS;ENDARCfflTECTUREART;例3.44十进制加法计数器之二。LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYCNT10BISPORT(CLR:INSTD_LOGIC;CLK:INSTD_LOGIC;CNT:BUFFERSTD_LOGIC_VECTOR(3DOWNT00));ENDENTITYCNT10B;ARCHITECTUREARTOFCNT10BISBEGINPROCESSISBEGINWAITUNTILCLK'EVENTANDCLK=’l’;IF(CLR=’1'ORCNT=9)THENCNT=0000;ELSECNT=CNT+1;ENDIF;ENDPROCESS;ENDARCHITECTUREART;3.66比较器LIBRARYIEEE;'USEIEEE.STD_LOGIC_1164.ALL;ENTITYCOMPAREISPORT(A,B:INSTD_LOGIC_VECTOR(7DOWNTO0);EQ:OUTSTD_LOGIC);ENDENTITYCOMPARE;ARCHITECTUREARTOFCOMPAREISBEGINEQ='1'WHENA=BELSE'0';ENDARCHITECTUREART;3.674选1信号选择器LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYMUX41ISPORT(X:INSTD_LOGIC_VECTOR(3DOWNTO0);A,B:INSTD_LOGIC;Y:OUTSTDLOGIC);ENDENTITYMUX41;ARCHITECTUREARTOFMUX41ISSIGNALSEL:STD_LOGIC_VECTOR(1DOWNT00);BEGINSEL=B&A;PROCESS(X,SEL)ISBEGINIF(SEL=00)THENY=X(0);ELSIF(SEL=01)THENY=X(l);ELSIF(SEL=11)THENY=X(2);ELSEY=X(3);ENDIF;ENDPROCESS;ENDARCHITECTUREART;3.684选l数据选择器。--MUXB41.VHDLIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYMUXB41ISPORT(DATA0,DATAl:INSTD_LOGIC_VECTOR(3DOWNIO0);DATA2,DATA3:INSTD_LOGIC_VECTOR(3DOWNTO0);A,B:INSTD_LOGIC;Y:OUTSTD_LOGIC_VECTOR(3DOWNTO0));ENDENTITYMUXB41;ARCHITECTUREARTOFMUXB411SSIGNALSEL:STD_LOGIC_VECTOR(1DOWNIO0));BEGINSElx=B&A;PROCESS(SEL)BEGINCASESELISWHEN00=Y=DATA0;WHEN0l=Y=DATA1;WHEN10=Y=DATA2;WHEN11=Y=DATA3;WHENOTHERS=Y=NULL;ENDCASE;ENDPROCESS;ENDARCHITECTUREART;【例3.72】D触发器LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYDCFQISPORT(D,CLK:INSTD_LOGIC;Q:OUTSTD_LOGIC);ENDENTITYDCFQ;ARCHITECTUREARTOFDCFQISBEGINPROCESS(CLK)ISBEGINIF(CLK'EVENTANDCLK='1')THENENDIF;ENDPROCESS;ENDARCHITECTUREART;例3.73非同步复位/置位的D触发器。LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYASYNDCFQISPORT(CLK,D,PRESET,CLR:INSTD_LOGIC;Q:OUTSTD_LOGIC);ENDENTITYASYNDCFQ;ARCHITECTUREARTOFASYNDCFQIsBEGINPROCESS(CLK,PRESET,CLR)ISBEGINIF(PRESET='1')THEN--置位信号为1,则触发器被置位Q=‘1’;ELSIF(CLR='1')THEN~复位信号为1,则触发器被复位Q=’0’;ELSIF(CLK'EVENTANDCLK='1')THENQ=D;ENDIF;ENDPROCESS;ENDARCHlTECTUREART;【例3.74]同步复位的D触发器。LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYSYNDCFQISPORT(D,CLK,RESET:INSTD_LOGIC;Q:OUTSTD_LOGIC);ENDENTITYSYNDCFQ;ARCHITECTUREARTOFSYNDCFQISBEGINPROCESS(CLK)ISBEGINIF(CLK'EVENTANDCLK='1')THENIF(RESET='0')THENQ=’0’;ELSEQ=D;ENDIF;ENDIF;ENDPROCESS;ENDARCHITECTUREART;例3.75JK触发器LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;ENTITYJKCFQISPORT(J,K,CLK:INSTD_LOGIC;Q,QB:BUFFERSTlD_LOGIC);ENDENTlTYJKCFQ;ARCHITECTUREARTOFJKCFQISSIGNALQ_S,QB_S:STD_LOGIC;BEGINPROCESS(CLK,JK)ISBEGINIF(CILK'EVENTANDCLK='1')THENQ_S=’0’;QB_S=’1’;ELSIF(J=’1’AND
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