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DatasheetOverviewSentaurusDeviceisanadvanced1D,2D,and3Ddevicesimulatorcapableofsimulatingtheelectrical,thermal,andopticalcharacteristicsofsiliconandcompoundsemiconductordevices.SentaurusDeviceisanew-generationdevicesimulatorfordesigningandoptimizingcurrentandfuturesemiconductortechnologiesincludingnanoscaleCMOS,FinFET,thinfilmtransistors(TFTs),flashmemory,SiGeheterojunctionbipolartransistors(HBTs),large-scalepowerdevices,compoundsemiconductors,CMOSimagesensors,light-emittingdiodes,andsemiconductorlasers.Inaddition,SentaurusDeviceenablestheanalysisofcomplexintegratedcircuitphenomenasuchaselectrostaticdischarge,latch-up,andsingleeventupset.SentaurusDeviceispartofthecomprehensivesuiteofcoreSynopsysTCADproductsformultidimensionalprocess,device,andsystemsimulations.SentaurusDeviceVersatile,MultifunctionalDeviceSimulatorBenefits• Explore new device concepts for which fabrication processes are not yet defined• Characterize electrical, thermal, and optical behavior of semiconductor devices for fast prototyping, development, and optimization of their performance• Shorten development time by supplementing experimental data with deep physical insight from simulation• Study the sensitivity of device characteristics to process variations for optimizing parametric yields• Generate electrical data for SPICE modeling and early-silicon circuit evaluationDescriptionSentaurus Device incorporates an extensive set of physical models and material parameters, and simulates 1D, 2D, and 3D geometries over a wide range of analysis modes: DC, AC, transient, and harmonic balance. Flexible multidimensional meshing engines allow users to generate structured or unstructured meshes effectively.Sentaurus Device offers a comprehensive set of options that allows for flexibility in configuring application-specific solutions. It interfaces directly with the Synopsys tools Sentaurus Process, Sentaurus Structure Editor, and Sentaurus Workbench to provide a complete state-of-the-art TCAD simulation environment.2SentaurusDeviceDeepSubmicron(DSM)CMOSandSOIAs the minimum feature size of CMOS devices decreases to less than 100 nm, physical effects such as stress-induced mobility enhancement, nonlocal and quantum transport, and random-doping fluctuations become increasingly important. Sentaurus Device includes state-of-the-art models to account for these effects in advanced applications.With scaling to smaller geometries, 3D effects have also become more prominent. Shallow trench isolation (STI) parasitic channel effects, narrow-width devices, SOI body-tie placement, and other inherently three-dimensional effects can be simulated with the 3D option. Figure 1 shows the impact of the body-tie placement on the snapback characteristics of an SOI device.Strained silicon offers the possibility to enhance carrier mobility, leading to higher saturation currents. The various approaches for introducing stress into the channel – for example, biaxial strain using relaxed SiGe buffers, uniaxial strain using SiGe source/drain regions, and nitride capping layers – can be simulated with Sentaurus Process and the resulting stress fields can be exported to Sentaurus Device to compute the stress-induced modifications to the silicon band structure and carrier mobility. Various stress-induced mobility models, either phenomenological or based on rigorous understanding of particle redistribution over the valleys, are available in Sentaurus Device. These models give technologists, who are pushing the limits of strained silicon towards the International Technology Roadmap forSemiconductors (ITRS) 65-nm and 45-nm node targets, benefits from the physical insight and predictive power of these types of full-flow stress simulation. For nanometer device transport, a complete set of transport and thermal models is available with the Advanced option. A robust hydrodynamic transport model accounts for nonlocal effects and carrier temperature leading to improved breakdown voltage and substrate current simulations. The hydrodynamic transport model is fully compatible with drift-diffusion in the limit of long-channel devices. Quantization effects in the channel can be treated with a computationally efficient density gradient model, which gives results comparable to a more rigorous Poisson–Schrödinger solver. In cases when self-heating is important, such as SOI, the transport equations can be coupled to the heat equation. With the Advanced option, it is also possible to implement user-defined models through the physical model interface (PMI) to provide yet another level of flexibility to advanced users.Sentaurus Device includes several important models to address tunneling mechanisms and leakage currents. Tunneling through arbitrary barriers, such as multilayer gate dielectrics, is handled with a nonlocal tunneling model. It is also possible to simulate tunneling to and from traps, a vital capability for simulating SONOS memory and particular devices using high-k gate dielectrics. Figure1