adf4350pdf

WidebandSynthesizerwithIntegratedVCOADF4350Rev.0InformationfurnishedbyAnalogDevicesisbelievedtobeaccurateandreliable.However,noresponsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorotherrightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.NolicenseisgrantedbyimplicationorotherwiseunderanypatentorpatentrightsofAnalogDevices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.OneTechnologyWay,P.O.Box9106,Norwood,MA02062-9106,U.S.A.Tel:[phone]©2008AnalogDevices,Inc.Allrightsreserved.FEATURESOutputfrequencyrange:137.5MHzto4400MHzFractional-Nsynthesizerandinteger-NsynthesizerLowphasenoiseVCOProgrammabledivide-by-1/-2/-4/-8/-16outputTypicalrmsjitter:0.5psrmsPowersupply:3.0Vto3.6VLogiccompatibility:1.8VProgrammabledual-modulusprescalerof4/5or8/9ProgrammableoutputpowerlevelRFoutputmutefunction3-wireserialinterfaceAnaloganddigitallockdetectSwitchedbandwidthfast-lockmodeCycleslipreductionAPPLICATIONSWirelessinfrastructure(W-CDMA,TD-SCDMA,WiMAX,GSM,PCS,DCS,DECT)TestequipmentWirelessLANs,CATVequipmentClockgenerationGENERALDESCRIPTIONTheADF4350allowsimplementationoffractional-Norinteger-Nphase-lockedloop(PLL)frequencysynthesizersifusedwithanexternalloopfilterandexternalreferencefrequency.TheADF4350hasanintegratedvoltagecontrolledoscillator(VCO)withafundamentaloutputfrequencyrangingfrom2200MHzto4400MHz.Inaddition,divide-by-1/2/4/8or16circuitsallowtheusertogenerateRFoutputfrequenciesaslowas137.5MHz.Forapplicationsthatrequireisolation,theRFoutputstagecanbemuted.Themutefunctionisbothpin-andsoftware-controllable.AnauxiliaryRFoutputisalsoavailable,whichcanbepowereddownifnotinuse.Controlofalltheon-chipregistersisthroughasimple3-wireinterface.Thedeviceoperateswithapowersupplyrangingfrom3.0Vto3.6Vandcanbepowereddownwhennotinuse.FUNCTIONALBLOCKDIAGRAMMUXOUTCPOUTLDSWVCOMTEMPREFINCLKDATALEAVDDSDVDDDVDDVPAGNDCEDGNDCPGNDSDGNDAGNDVCORSETVVCOVTUNEVREFRFOUTA+RFOUTA–RFOUTB+RFOUTB–VCOCOREPHASECOMPARATORFLOSWITCHCHARGEPUMPOUTPUTSTAGEOUTPUTSTAGEPDBRFMULTIPLEXERMULTIPLEXER10-BITRCOUNTER÷2DIVIDER×2DOUBLERFUNCTIONLATCHDATAREGISTERINTEGERREGNCOUNTERFRACTIONREGTHIRD-ORDERFRACTIONALINTERPOLATORMODULUSREGMULTIPLEXERLOCKDETECT÷1/2/4/8/16ADF435007325-001Figure1.ADF4350Rev.0|Page2of28TABLEOFCONTENTSFeatures..............................................................................................1 Applications.......................................................................................1 GeneralDescription.........................................................................1 FunctionalBlockDiagram..............................................................1 RevisionHistory...............................................................................2 Specifications.....................................................................................3 TimingCharacteristics................................................................5 AbsoluteMaximumRatings............................................................6 TransistorCount...........................................................................6 ESDCaution..................................................................................6 PinConfigurationandFunctionDescriptions.............................7 TypicalPerformanceCharacteristics.............................................9 CircuitDescription.........................................................................11 ReferenceInputSection.............................................................11 RFNDivider...............................................................................11 INT,FRAC,MOD,andRCounterRelationship....................11 INTNMODE.............................................................................11 RCounter....................................................................................11 PhaseFrequencyDetector(PFD)andChargePump............11 MUXOUTandLOCKDetect...................................................12 InputShiftRegisters...................................................................12 ProgramModes..........................................................................12 VCO..............................................................................................12 OutputStage................................................................................13 RegisterMaps..................................................................................14 Register0.....................................................................................18 Register1.....................................................................................18 Register2.....................................................................................18 Register3.....................................................................................20 Register4.....................................................................................20 Register